mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 09:42:17 +07:00
b9224cd738
In KVM code we use masks to test/set control registers. Let's define the ones we use in arch/s390/include/asm/ctl_reg.h and replace all occurrences in KVM code. As we will be needing the define for Clock-comparator sign control soon, let's also add it. Suggested-by: Collin L. Walling <walling@linux.ibm.com> Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Collin Walling <walling@linux.ibm.com> Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
627 lines
16 KiB
C
627 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* kvm guest debug support
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*
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* Copyright IBM Corp. 2014
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*
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* Author(s): David Hildenbrand <dahi@linux.vnet.ibm.com>
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*/
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#include <linux/kvm_host.h>
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#include <linux/errno.h>
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#include "kvm-s390.h"
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#include "gaccess.h"
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/*
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* Extends the address range given by *start and *stop to include the address
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* range starting with estart and the length len. Takes care of overflowing
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* intervals and tries to minimize the overall interval size.
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*/
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static void extend_address_range(u64 *start, u64 *stop, u64 estart, int len)
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{
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u64 estop;
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if (len > 0)
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len--;
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else
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len = 0;
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estop = estart + len;
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/* 0-0 range represents "not set" */
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if ((*start == 0) && (*stop == 0)) {
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*start = estart;
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*stop = estop;
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} else if (*start <= *stop) {
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/* increase the existing range */
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if (estart < *start)
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*start = estart;
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if (estop > *stop)
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*stop = estop;
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} else {
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/* "overflowing" interval, whereby *stop > *start */
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if (estart <= *stop) {
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if (estop > *stop)
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*stop = estop;
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} else if (estop > *start) {
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if (estart < *start)
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*start = estart;
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}
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/* minimize the range */
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else if ((estop - *stop) < (*start - estart))
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*stop = estop;
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else
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*start = estart;
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}
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}
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#define MAX_INST_SIZE 6
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static void enable_all_hw_bp(struct kvm_vcpu *vcpu)
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{
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unsigned long start, len;
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u64 *cr9 = &vcpu->arch.sie_block->gcr[9];
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u64 *cr10 = &vcpu->arch.sie_block->gcr[10];
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u64 *cr11 = &vcpu->arch.sie_block->gcr[11];
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int i;
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if (vcpu->arch.guestdbg.nr_hw_bp <= 0 ||
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vcpu->arch.guestdbg.hw_bp_info == NULL)
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return;
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/*
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* If the guest is not interested in branching events, we can safely
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* limit them to the PER address range.
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*/
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if (!(*cr9 & PER_EVENT_BRANCH))
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*cr9 |= PER_CONTROL_BRANCH_ADDRESS;
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*cr9 |= PER_EVENT_IFETCH | PER_EVENT_BRANCH;
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for (i = 0; i < vcpu->arch.guestdbg.nr_hw_bp; i++) {
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start = vcpu->arch.guestdbg.hw_bp_info[i].addr;
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len = vcpu->arch.guestdbg.hw_bp_info[i].len;
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/*
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* The instruction in front of the desired bp has to
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* report instruction-fetching events
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*/
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if (start < MAX_INST_SIZE) {
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len += start;
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start = 0;
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} else {
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start -= MAX_INST_SIZE;
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len += MAX_INST_SIZE;
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}
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extend_address_range(cr10, cr11, start, len);
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}
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}
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static void enable_all_hw_wp(struct kvm_vcpu *vcpu)
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{
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unsigned long start, len;
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u64 *cr9 = &vcpu->arch.sie_block->gcr[9];
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u64 *cr10 = &vcpu->arch.sie_block->gcr[10];
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u64 *cr11 = &vcpu->arch.sie_block->gcr[11];
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int i;
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if (vcpu->arch.guestdbg.nr_hw_wp <= 0 ||
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vcpu->arch.guestdbg.hw_wp_info == NULL)
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return;
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/* if host uses storage alternation for special address
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* spaces, enable all events and give all to the guest */
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if (*cr9 & PER_EVENT_STORE && *cr9 & PER_CONTROL_ALTERATION) {
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*cr9 &= ~PER_CONTROL_ALTERATION;
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*cr10 = 0;
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*cr11 = -1UL;
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} else {
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*cr9 &= ~PER_CONTROL_ALTERATION;
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*cr9 |= PER_EVENT_STORE;
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for (i = 0; i < vcpu->arch.guestdbg.nr_hw_wp; i++) {
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start = vcpu->arch.guestdbg.hw_wp_info[i].addr;
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len = vcpu->arch.guestdbg.hw_wp_info[i].len;
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extend_address_range(cr10, cr11, start, len);
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}
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}
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}
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void kvm_s390_backup_guest_per_regs(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0];
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vcpu->arch.guestdbg.cr9 = vcpu->arch.sie_block->gcr[9];
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vcpu->arch.guestdbg.cr10 = vcpu->arch.sie_block->gcr[10];
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vcpu->arch.guestdbg.cr11 = vcpu->arch.sie_block->gcr[11];
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}
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void kvm_s390_restore_guest_per_regs(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.sie_block->gcr[0] = vcpu->arch.guestdbg.cr0;
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vcpu->arch.sie_block->gcr[9] = vcpu->arch.guestdbg.cr9;
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vcpu->arch.sie_block->gcr[10] = vcpu->arch.guestdbg.cr10;
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vcpu->arch.sie_block->gcr[11] = vcpu->arch.guestdbg.cr11;
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}
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void kvm_s390_patch_guest_per_regs(struct kvm_vcpu *vcpu)
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{
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/*
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* TODO: if guest psw has per enabled, otherwise 0s!
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* This reduces the amount of reported events.
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* Need to intercept all psw changes!
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*/
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if (guestdbg_sstep_enabled(vcpu)) {
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/* disable timer (clock-comparator) interrupts */
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vcpu->arch.sie_block->gcr[0] &= ~CR0_CLOCK_COMPARATOR_SUBMASK;
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vcpu->arch.sie_block->gcr[9] |= PER_EVENT_IFETCH;
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vcpu->arch.sie_block->gcr[10] = 0;
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vcpu->arch.sie_block->gcr[11] = -1UL;
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}
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if (guestdbg_hw_bp_enabled(vcpu)) {
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enable_all_hw_bp(vcpu);
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enable_all_hw_wp(vcpu);
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}
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/* TODO: Instruction-fetching-nullification not allowed for now */
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if (vcpu->arch.sie_block->gcr[9] & PER_EVENT_NULLIFICATION)
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vcpu->arch.sie_block->gcr[9] &= ~PER_EVENT_NULLIFICATION;
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}
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#define MAX_WP_SIZE 100
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static int __import_wp_info(struct kvm_vcpu *vcpu,
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struct kvm_hw_breakpoint *bp_data,
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struct kvm_hw_wp_info_arch *wp_info)
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{
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int ret = 0;
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wp_info->len = bp_data->len;
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wp_info->addr = bp_data->addr;
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wp_info->phys_addr = bp_data->phys_addr;
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wp_info->old_data = NULL;
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if (wp_info->len < 0 || wp_info->len > MAX_WP_SIZE)
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return -EINVAL;
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wp_info->old_data = kmalloc(bp_data->len, GFP_KERNEL);
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if (!wp_info->old_data)
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return -ENOMEM;
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/* try to backup the original value */
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ret = read_guest_abs(vcpu, wp_info->phys_addr, wp_info->old_data,
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wp_info->len);
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if (ret) {
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kfree(wp_info->old_data);
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wp_info->old_data = NULL;
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}
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return ret;
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}
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#define MAX_BP_COUNT 50
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int kvm_s390_import_bp_data(struct kvm_vcpu *vcpu,
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struct kvm_guest_debug *dbg)
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{
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int ret = 0, nr_wp = 0, nr_bp = 0, i;
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struct kvm_hw_breakpoint *bp_data = NULL;
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struct kvm_hw_wp_info_arch *wp_info = NULL;
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struct kvm_hw_bp_info_arch *bp_info = NULL;
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if (dbg->arch.nr_hw_bp <= 0 || !dbg->arch.hw_bp)
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return 0;
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else if (dbg->arch.nr_hw_bp > MAX_BP_COUNT)
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return -EINVAL;
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bp_data = memdup_user(dbg->arch.hw_bp,
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sizeof(*bp_data) * dbg->arch.nr_hw_bp);
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if (IS_ERR(bp_data))
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return PTR_ERR(bp_data);
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for (i = 0; i < dbg->arch.nr_hw_bp; i++) {
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switch (bp_data[i].type) {
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case KVM_HW_WP_WRITE:
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nr_wp++;
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break;
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case KVM_HW_BP:
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nr_bp++;
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break;
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default:
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break;
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}
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}
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if (nr_wp > 0) {
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wp_info = kmalloc_array(nr_wp,
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sizeof(*wp_info),
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GFP_KERNEL);
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if (!wp_info) {
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ret = -ENOMEM;
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goto error;
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}
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}
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if (nr_bp > 0) {
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bp_info = kmalloc_array(nr_bp,
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sizeof(*bp_info),
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GFP_KERNEL);
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if (!bp_info) {
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ret = -ENOMEM;
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goto error;
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}
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}
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for (nr_wp = 0, nr_bp = 0, i = 0; i < dbg->arch.nr_hw_bp; i++) {
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switch (bp_data[i].type) {
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case KVM_HW_WP_WRITE:
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ret = __import_wp_info(vcpu, &bp_data[i],
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&wp_info[nr_wp]);
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if (ret)
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goto error;
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nr_wp++;
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break;
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case KVM_HW_BP:
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bp_info[nr_bp].len = bp_data[i].len;
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bp_info[nr_bp].addr = bp_data[i].addr;
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nr_bp++;
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break;
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}
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}
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vcpu->arch.guestdbg.nr_hw_bp = nr_bp;
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vcpu->arch.guestdbg.hw_bp_info = bp_info;
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vcpu->arch.guestdbg.nr_hw_wp = nr_wp;
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vcpu->arch.guestdbg.hw_wp_info = wp_info;
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return 0;
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error:
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kfree(bp_data);
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kfree(wp_info);
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kfree(bp_info);
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return ret;
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}
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void kvm_s390_clear_bp_data(struct kvm_vcpu *vcpu)
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{
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int i;
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struct kvm_hw_wp_info_arch *hw_wp_info = NULL;
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for (i = 0; i < vcpu->arch.guestdbg.nr_hw_wp; i++) {
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hw_wp_info = &vcpu->arch.guestdbg.hw_wp_info[i];
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kfree(hw_wp_info->old_data);
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hw_wp_info->old_data = NULL;
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}
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kfree(vcpu->arch.guestdbg.hw_wp_info);
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vcpu->arch.guestdbg.hw_wp_info = NULL;
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kfree(vcpu->arch.guestdbg.hw_bp_info);
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vcpu->arch.guestdbg.hw_bp_info = NULL;
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vcpu->arch.guestdbg.nr_hw_wp = 0;
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vcpu->arch.guestdbg.nr_hw_bp = 0;
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}
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static inline int in_addr_range(u64 addr, u64 a, u64 b)
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{
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if (a <= b)
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return (addr >= a) && (addr <= b);
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else
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/* "overflowing" interval */
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return (addr >= a) || (addr <= b);
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}
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#define end_of_range(bp_info) (bp_info->addr + bp_info->len - 1)
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static struct kvm_hw_bp_info_arch *find_hw_bp(struct kvm_vcpu *vcpu,
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unsigned long addr)
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{
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struct kvm_hw_bp_info_arch *bp_info = vcpu->arch.guestdbg.hw_bp_info;
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int i;
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if (vcpu->arch.guestdbg.nr_hw_bp == 0)
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return NULL;
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for (i = 0; i < vcpu->arch.guestdbg.nr_hw_bp; i++) {
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/* addr is directly the start or in the range of a bp */
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if (addr == bp_info->addr)
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goto found;
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if (bp_info->len > 0 &&
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in_addr_range(addr, bp_info->addr, end_of_range(bp_info)))
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goto found;
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bp_info++;
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}
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return NULL;
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found:
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return bp_info;
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}
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static struct kvm_hw_wp_info_arch *any_wp_changed(struct kvm_vcpu *vcpu)
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{
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int i;
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struct kvm_hw_wp_info_arch *wp_info = NULL;
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void *temp = NULL;
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if (vcpu->arch.guestdbg.nr_hw_wp == 0)
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return NULL;
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for (i = 0; i < vcpu->arch.guestdbg.nr_hw_wp; i++) {
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wp_info = &vcpu->arch.guestdbg.hw_wp_info[i];
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if (!wp_info || !wp_info->old_data || wp_info->len <= 0)
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continue;
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temp = kmalloc(wp_info->len, GFP_KERNEL);
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if (!temp)
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continue;
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/* refetch the wp data and compare it to the old value */
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if (!read_guest_abs(vcpu, wp_info->phys_addr, temp,
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wp_info->len)) {
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if (memcmp(temp, wp_info->old_data, wp_info->len)) {
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kfree(temp);
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return wp_info;
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}
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}
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kfree(temp);
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temp = NULL;
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}
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return NULL;
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}
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void kvm_s390_prepare_debug_exit(struct kvm_vcpu *vcpu)
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{
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vcpu->run->exit_reason = KVM_EXIT_DEBUG;
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vcpu->guest_debug &= ~KVM_GUESTDBG_EXIT_PENDING;
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}
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#define PER_CODE_MASK (PER_EVENT_MASK >> 24)
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#define PER_CODE_BRANCH (PER_EVENT_BRANCH >> 24)
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#define PER_CODE_IFETCH (PER_EVENT_IFETCH >> 24)
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#define PER_CODE_STORE (PER_EVENT_STORE >> 24)
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#define PER_CODE_STORE_REAL (PER_EVENT_STORE_REAL >> 24)
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#define per_bp_event(code) \
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(code & (PER_CODE_IFETCH | PER_CODE_BRANCH))
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#define per_write_wp_event(code) \
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(code & (PER_CODE_STORE | PER_CODE_STORE_REAL))
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static int debug_exit_required(struct kvm_vcpu *vcpu, u8 perc,
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unsigned long peraddr)
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{
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struct kvm_debug_exit_arch *debug_exit = &vcpu->run->debug.arch;
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struct kvm_hw_wp_info_arch *wp_info = NULL;
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struct kvm_hw_bp_info_arch *bp_info = NULL;
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unsigned long addr = vcpu->arch.sie_block->gpsw.addr;
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if (guestdbg_hw_bp_enabled(vcpu)) {
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if (per_write_wp_event(perc) &&
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vcpu->arch.guestdbg.nr_hw_wp > 0) {
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wp_info = any_wp_changed(vcpu);
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if (wp_info) {
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debug_exit->addr = wp_info->addr;
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debug_exit->type = KVM_HW_WP_WRITE;
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goto exit_required;
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}
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}
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if (per_bp_event(perc) &&
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vcpu->arch.guestdbg.nr_hw_bp > 0) {
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bp_info = find_hw_bp(vcpu, addr);
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/* remove duplicate events if PC==PER address */
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if (bp_info && (addr != peraddr)) {
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debug_exit->addr = addr;
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debug_exit->type = KVM_HW_BP;
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vcpu->arch.guestdbg.last_bp = addr;
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goto exit_required;
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}
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/* breakpoint missed */
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bp_info = find_hw_bp(vcpu, peraddr);
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if (bp_info && vcpu->arch.guestdbg.last_bp != peraddr) {
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debug_exit->addr = peraddr;
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debug_exit->type = KVM_HW_BP;
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goto exit_required;
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}
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}
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}
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if (guestdbg_sstep_enabled(vcpu) && per_bp_event(perc)) {
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debug_exit->addr = addr;
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debug_exit->type = KVM_SINGLESTEP;
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goto exit_required;
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}
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return 0;
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exit_required:
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return 1;
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}
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static int per_fetched_addr(struct kvm_vcpu *vcpu, unsigned long *addr)
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{
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u8 exec_ilen = 0;
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u16 opcode[3];
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int rc;
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if (vcpu->arch.sie_block->icptcode == ICPT_PROGI) {
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/* PER address references the fetched or the execute instr */
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*addr = vcpu->arch.sie_block->peraddr;
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/*
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* Manually detect if we have an EXECUTE instruction. As
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* instructions are always 2 byte aligned we can read the
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* first two bytes unconditionally
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*/
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rc = read_guest_instr(vcpu, *addr, &opcode, 2);
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if (rc)
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return rc;
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if (opcode[0] >> 8 == 0x44)
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exec_ilen = 4;
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if ((opcode[0] & 0xff0f) == 0xc600)
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exec_ilen = 6;
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} else {
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/* instr was suppressed, calculate the responsible instr */
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*addr = __rewind_psw(vcpu->arch.sie_block->gpsw,
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kvm_s390_get_ilen(vcpu));
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if (vcpu->arch.sie_block->icptstatus & 0x01) {
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exec_ilen = (vcpu->arch.sie_block->icptstatus & 0x60) >> 4;
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if (!exec_ilen)
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exec_ilen = 4;
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}
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}
|
|
|
|
if (exec_ilen) {
|
|
/* read the complete EXECUTE instr to detect the fetched addr */
|
|
rc = read_guest_instr(vcpu, *addr, &opcode, exec_ilen);
|
|
if (rc)
|
|
return rc;
|
|
if (exec_ilen == 6) {
|
|
/* EXECUTE RELATIVE LONG - RIL-b format */
|
|
s32 rl = *((s32 *) (opcode + 1));
|
|
|
|
/* rl is a _signed_ 32 bit value specifying halfwords */
|
|
*addr += (u64)(s64) rl * 2;
|
|
} else {
|
|
/* EXECUTE - RX-a format */
|
|
u32 base = (opcode[1] & 0xf000) >> 12;
|
|
u32 disp = opcode[1] & 0x0fff;
|
|
u32 index = opcode[0] & 0x000f;
|
|
|
|
*addr = base ? vcpu->run->s.regs.gprs[base] : 0;
|
|
*addr += index ? vcpu->run->s.regs.gprs[index] : 0;
|
|
*addr += disp;
|
|
}
|
|
*addr = kvm_s390_logical_to_effective(vcpu, *addr);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#define guest_per_enabled(vcpu) \
|
|
(vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PER)
|
|
|
|
int kvm_s390_handle_per_ifetch_icpt(struct kvm_vcpu *vcpu)
|
|
{
|
|
const u64 cr10 = vcpu->arch.sie_block->gcr[10];
|
|
const u64 cr11 = vcpu->arch.sie_block->gcr[11];
|
|
const u8 ilen = kvm_s390_get_ilen(vcpu);
|
|
struct kvm_s390_pgm_info pgm_info = {
|
|
.code = PGM_PER,
|
|
.per_code = PER_CODE_IFETCH,
|
|
.per_address = __rewind_psw(vcpu->arch.sie_block->gpsw, ilen),
|
|
};
|
|
unsigned long fetched_addr;
|
|
int rc;
|
|
|
|
/*
|
|
* The PSW points to the next instruction, therefore the intercepted
|
|
* instruction generated a PER i-fetch event. PER address therefore
|
|
* points at the previous PSW address (could be an EXECUTE function).
|
|
*/
|
|
if (!guestdbg_enabled(vcpu))
|
|
return kvm_s390_inject_prog_irq(vcpu, &pgm_info);
|
|
|
|
if (debug_exit_required(vcpu, pgm_info.per_code, pgm_info.per_address))
|
|
vcpu->guest_debug |= KVM_GUESTDBG_EXIT_PENDING;
|
|
|
|
if (!guest_per_enabled(vcpu) ||
|
|
!(vcpu->arch.sie_block->gcr[9] & PER_EVENT_IFETCH))
|
|
return 0;
|
|
|
|
rc = per_fetched_addr(vcpu, &fetched_addr);
|
|
if (rc < 0)
|
|
return rc;
|
|
if (rc)
|
|
/* instruction-fetching exceptions */
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
|
|
if (in_addr_range(fetched_addr, cr10, cr11))
|
|
return kvm_s390_inject_prog_irq(vcpu, &pgm_info);
|
|
return 0;
|
|
}
|
|
|
|
static int filter_guest_per_event(struct kvm_vcpu *vcpu)
|
|
{
|
|
const u8 perc = vcpu->arch.sie_block->perc;
|
|
u64 addr = vcpu->arch.sie_block->gpsw.addr;
|
|
u64 cr9 = vcpu->arch.sie_block->gcr[9];
|
|
u64 cr10 = vcpu->arch.sie_block->gcr[10];
|
|
u64 cr11 = vcpu->arch.sie_block->gcr[11];
|
|
/* filter all events, demanded by the guest */
|
|
u8 guest_perc = perc & (cr9 >> 24) & PER_CODE_MASK;
|
|
unsigned long fetched_addr;
|
|
int rc;
|
|
|
|
if (!guest_per_enabled(vcpu))
|
|
guest_perc = 0;
|
|
|
|
/* filter "successful-branching" events */
|
|
if (guest_perc & PER_CODE_BRANCH &&
|
|
cr9 & PER_CONTROL_BRANCH_ADDRESS &&
|
|
!in_addr_range(addr, cr10, cr11))
|
|
guest_perc &= ~PER_CODE_BRANCH;
|
|
|
|
/* filter "instruction-fetching" events */
|
|
if (guest_perc & PER_CODE_IFETCH) {
|
|
rc = per_fetched_addr(vcpu, &fetched_addr);
|
|
if (rc < 0)
|
|
return rc;
|
|
/*
|
|
* Don't inject an irq on exceptions. This would make handling
|
|
* on icpt code 8 very complex (as PSW was already rewound).
|
|
*/
|
|
if (rc || !in_addr_range(fetched_addr, cr10, cr11))
|
|
guest_perc &= ~PER_CODE_IFETCH;
|
|
}
|
|
|
|
/* All other PER events will be given to the guest */
|
|
/* TODO: Check altered address/address space */
|
|
|
|
vcpu->arch.sie_block->perc = guest_perc;
|
|
|
|
if (!guest_perc)
|
|
vcpu->arch.sie_block->iprcc &= ~PGM_PER;
|
|
return 0;
|
|
}
|
|
|
|
#define pssec(vcpu) (vcpu->arch.sie_block->gcr[1] & _ASCE_SPACE_SWITCH)
|
|
#define hssec(vcpu) (vcpu->arch.sie_block->gcr[13] & _ASCE_SPACE_SWITCH)
|
|
#define old_ssec(vcpu) ((vcpu->arch.sie_block->tecmc >> 31) & 0x1)
|
|
#define old_as_is_home(vcpu) !(vcpu->arch.sie_block->tecmc & 0xffff)
|
|
|
|
int kvm_s390_handle_per_event(struct kvm_vcpu *vcpu)
|
|
{
|
|
int rc, new_as;
|
|
|
|
if (debug_exit_required(vcpu, vcpu->arch.sie_block->perc,
|
|
vcpu->arch.sie_block->peraddr))
|
|
vcpu->guest_debug |= KVM_GUESTDBG_EXIT_PENDING;
|
|
|
|
rc = filter_guest_per_event(vcpu);
|
|
if (rc)
|
|
return rc;
|
|
|
|
/*
|
|
* Only RP, SAC, SACF, PT, PTI, PR, PC instructions can trigger
|
|
* a space-switch event. PER events enforce space-switch events
|
|
* for these instructions. So if no PER event for the guest is left,
|
|
* we might have to filter the space-switch element out, too.
|
|
*/
|
|
if (vcpu->arch.sie_block->iprcc == PGM_SPACE_SWITCH) {
|
|
vcpu->arch.sie_block->iprcc = 0;
|
|
new_as = psw_bits(vcpu->arch.sie_block->gpsw).as;
|
|
|
|
/*
|
|
* If the AS changed from / to home, we had RP, SAC or SACF
|
|
* instruction. Check primary and home space-switch-event
|
|
* controls. (theoretically home -> home produced no event)
|
|
*/
|
|
if (((new_as == PSW_BITS_AS_HOME) ^ old_as_is_home(vcpu)) &&
|
|
(pssec(vcpu) || hssec(vcpu)))
|
|
vcpu->arch.sie_block->iprcc = PGM_SPACE_SWITCH;
|
|
|
|
/*
|
|
* PT, PTI, PR, PC instruction operate on primary AS only. Check
|
|
* if the primary-space-switch-event control was or got set.
|
|
*/
|
|
if (new_as == PSW_BITS_AS_PRIMARY && !old_as_is_home(vcpu) &&
|
|
(pssec(vcpu) || old_ssec(vcpu)))
|
|
vcpu->arch.sie_block->iprcc = PGM_SPACE_SWITCH;
|
|
}
|
|
return 0;
|
|
}
|