Ville Syrjälä ab53c267f2 drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV ... CHV uses the gen8 shadow register mechanism so we shouldn't be checking the GT FIFO status. This effectively removes the posting read, so add an explicit posting read using FORCEWAKE_ACK_VLV (which is what use in vlv_forcewake_reset()). Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-06-11 16:57:28 +02:00
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drm	drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV	2014-06-11 16:57:28 +02:00
host1x	gpu: host1x: Rename internal functions for clarity	2014-06-05 23:10:30 +02:00
ipu-v3	gpu: ipu-v3: Register the CSI modules	2014-06-04 11:07:12 +02:00
vga	vgaswitcheroo: switch the mux to the igp on power down when runpm is enabled	2014-06-02 10:25:08 -04:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00