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5baf63cc4d
So far we are using frontbuffer tracking for everything and ignoring that PSR has a HW capable HW tracking for many modern usages of GPU on Core platforms and newer Atom ones. One reason for that is that we were trying to keep same infrastructure in place for VLV/CHV than the rest of platforms. But also because when this infrastructure was created the front-buffer-tracking origin wasn't that good and stable how it is today after Paulo reworked it to attend FBC cases. However this PSR implementation without HW tracking died on gen8LP. And newer platforms are starting to demand more HW tracking specially with PSR2 cases in mind. By disabling and re-enabling PSR totally every time we believe someone is going to change the front buffer content we don't allow PSR HW tracking to do this job and specially compromising the whole idea of PSR2 case where the HW tracking detect only the damaged area and do a partial screen update. So, from now on, on the platforms that has hw_tracking let's rely more on HW tracking. This also is the case in used by other drivers and more validated by SV teams. So I hope that this will lead us to less misterious bugs. v2: Only do this for platform that actually has hw tracking. v3 from DK Do this only for flips, small gradual changes are better. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180307033420.3086-3-dhinakaran.pandiyan@intel.com
205 lines
7.7 KiB
C
205 lines
7.7 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Daniel Vetter <daniel.vetter@ffwll.ch>
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*/
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/**
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* DOC: frontbuffer tracking
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*
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* Many features require us to track changes to the currently active
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* frontbuffer, especially rendering targeted at the frontbuffer.
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*
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* To be able to do so GEM tracks frontbuffers using a bitmask for all possible
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* frontbuffer slots through i915_gem_track_fb(). The function in this file are
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* then called when the contents of the frontbuffer are invalidated, when
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* frontbuffer rendering has stopped again to flush out all the changes and when
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* the frontbuffer is exchanged with a flip. Subsystems interested in
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* frontbuffer changes (e.g. PSR, FBC, DRRS) should directly put their callbacks
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* into the relevant places and filter for the frontbuffer slots that they are
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* interested int.
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*
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* On a high level there are two types of powersaving features. The first one
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* work like a special cache (FBC and PSR) and are interested when they should
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* stop caching and when to restart caching. This is done by placing callbacks
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* into the invalidate and the flush functions: At invalidate the caching must
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* be stopped and at flush time it can be restarted. And maybe they need to know
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* when the frontbuffer changes (e.g. when the hw doesn't initiate an invalidate
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* and flush on its own) which can be achieved with placing callbacks into the
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* flip functions.
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*
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* The other type of display power saving feature only cares about busyness
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* (e.g. DRRS). In that case all three (invalidate, flush and flip) indicate
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* busyness. There is no direct way to detect idleness. Instead an idle timer
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* work delayed work should be started from the flush and flip functions and
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* cancelled as soon as busyness is detected.
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*
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* Note that there's also an older frontbuffer activity tracking scheme which
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* just tracks general activity. This is done by the various mark_busy and
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* mark_idle functions. For display power management features using these
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* functions is deprecated and should be avoided.
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*/
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#include <drm/drmP.h>
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#include "intel_drv.h"
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#include "intel_frontbuffer.h"
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#include "i915_drv.h"
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void __intel_fb_obj_invalidate(struct drm_i915_gem_object *obj,
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enum fb_op_origin origin,
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unsigned int frontbuffer_bits)
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{
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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if (origin == ORIGIN_CS) {
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spin_lock(&dev_priv->fb_tracking.lock);
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dev_priv->fb_tracking.busy_bits |= frontbuffer_bits;
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dev_priv->fb_tracking.flip_bits &= ~frontbuffer_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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}
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might_sleep();
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intel_psr_invalidate(dev_priv, frontbuffer_bits, origin);
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intel_edp_drrs_invalidate(dev_priv, frontbuffer_bits);
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intel_fbc_invalidate(dev_priv, frontbuffer_bits, origin);
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}
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/**
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* intel_frontbuffer_flush - flush frontbuffer
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* @dev_priv: i915 device
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* @frontbuffer_bits: frontbuffer plane tracking bits
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* @origin: which operation caused the flush
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*
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* This function gets called every time rendering on the given planes has
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* completed and frontbuffer caching can be started again. Flushes will get
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* delayed if they're blocked by some outstanding asynchronous rendering.
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*
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* Can be called without any locks held.
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*/
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static void intel_frontbuffer_flush(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin)
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{
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/* Delay flushing when rings are still busy.*/
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spin_lock(&dev_priv->fb_tracking.lock);
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frontbuffer_bits &= ~dev_priv->fb_tracking.busy_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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if (!frontbuffer_bits)
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return;
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might_sleep();
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intel_edp_drrs_flush(dev_priv, frontbuffer_bits);
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intel_psr_flush(dev_priv, frontbuffer_bits, origin);
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intel_fbc_flush(dev_priv, frontbuffer_bits, origin);
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}
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void __intel_fb_obj_flush(struct drm_i915_gem_object *obj,
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enum fb_op_origin origin,
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unsigned int frontbuffer_bits)
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{
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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if (origin == ORIGIN_CS) {
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spin_lock(&dev_priv->fb_tracking.lock);
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/* Filter out new bits since rendering started. */
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frontbuffer_bits &= dev_priv->fb_tracking.busy_bits;
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dev_priv->fb_tracking.busy_bits &= ~frontbuffer_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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}
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if (frontbuffer_bits)
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intel_frontbuffer_flush(dev_priv, frontbuffer_bits, origin);
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}
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/**
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* intel_frontbuffer_flip_prepare - prepare asynchronous frontbuffer flip
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* @dev_priv: i915 device
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* @frontbuffer_bits: frontbuffer plane tracking bits
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*
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* This function gets called after scheduling a flip on @obj. The actual
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* frontbuffer flushing will be delayed until completion is signalled with
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* intel_frontbuffer_flip_complete. If an invalidate happens in between this
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* flush will be cancelled.
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*
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* Can be called without any locks held.
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*/
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void intel_frontbuffer_flip_prepare(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits)
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{
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spin_lock(&dev_priv->fb_tracking.lock);
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dev_priv->fb_tracking.flip_bits |= frontbuffer_bits;
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/* Remove stale busy bits due to the old buffer. */
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dev_priv->fb_tracking.busy_bits &= ~frontbuffer_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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intel_psr_single_frame_update(dev_priv, frontbuffer_bits);
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}
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/**
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* intel_frontbuffer_flip_complete - complete asynchronous frontbuffer flip
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* @dev_priv: i915 device
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* @frontbuffer_bits: frontbuffer plane tracking bits
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*
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* This function gets called after the flip has been latched and will complete
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* on the next vblank. It will execute the flush if it hasn't been cancelled yet.
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*
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* Can be called without any locks held.
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*/
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void intel_frontbuffer_flip_complete(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits)
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{
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spin_lock(&dev_priv->fb_tracking.lock);
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/* Mask any cancelled flips. */
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frontbuffer_bits &= dev_priv->fb_tracking.flip_bits;
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dev_priv->fb_tracking.flip_bits &= ~frontbuffer_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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if (frontbuffer_bits)
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intel_frontbuffer_flush(dev_priv,
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frontbuffer_bits, ORIGIN_FLIP);
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}
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/**
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* intel_frontbuffer_flip - synchronous frontbuffer flip
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* @dev_priv: i915 device
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* @frontbuffer_bits: frontbuffer plane tracking bits
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*
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* This function gets called after scheduling a flip on @obj. This is for
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* synchronous plane updates which will happen on the next vblank and which will
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* not get delayed by pending gpu rendering.
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*
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* Can be called without any locks held.
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*/
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void intel_frontbuffer_flip(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits)
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{
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spin_lock(&dev_priv->fb_tracking.lock);
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/* Remove stale busy bits due to the old buffer. */
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dev_priv->fb_tracking.busy_bits &= ~frontbuffer_bits;
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spin_unlock(&dev_priv->fb_tracking.lock);
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intel_frontbuffer_flush(dev_priv, frontbuffer_bits, ORIGIN_FLIP);
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}
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