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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ac52841ce7
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
324 lines
8.2 KiB
C
324 lines
8.2 KiB
C
/*
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* Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the version 2 of the GNU General Public License
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/can/dev.h>
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#include <linux/can/platform/sja1000.h>
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#include "sja1000.h"
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#define DRV_NAME "sja1000_isa"
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#define MAXDEV 8
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MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
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MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
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MODULE_LICENSE("GPL v2");
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#define CLK_DEFAULT 16000000 /* 16 MHz */
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#define CDR_DEFAULT (CDR_CBP | CDR_CLK_OFF)
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#define OCR_DEFAULT OCR_TX0_PUSHPULL
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static unsigned long port[MAXDEV];
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static unsigned long mem[MAXDEV];
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static int irq[MAXDEV];
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static int clk[MAXDEV];
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static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
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static spinlock_t indirect_lock[MAXDEV]; /* lock for indirect access mode */
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module_param_array(port, ulong, NULL, S_IRUGO);
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MODULE_PARM_DESC(port, "I/O port number");
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module_param_array(mem, ulong, NULL, S_IRUGO);
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MODULE_PARM_DESC(mem, "I/O memory address");
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module_param_array(indirect, int, NULL, S_IRUGO);
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MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
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module_param_array(irq, int, NULL, S_IRUGO);
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MODULE_PARM_DESC(irq, "IRQ number");
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module_param_array(clk, int, NULL, S_IRUGO);
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MODULE_PARM_DESC(clk, "External oscillator clock frequency "
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"(default=16000000 [16 MHz])");
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module_param_array(cdr, byte, NULL, S_IRUGO);
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MODULE_PARM_DESC(cdr, "Clock divider register "
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"(default=0x48 [CDR_CBP | CDR_CLK_OFF])");
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module_param_array(ocr, byte, NULL, S_IRUGO);
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MODULE_PARM_DESC(ocr, "Output control register "
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"(default=0x18 [OCR_TX0_PUSHPULL])");
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#define SJA1000_IOSIZE 0x20
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#define SJA1000_IOSIZE_INDIRECT 0x02
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static struct platform_device *sja1000_isa_devs[MAXDEV];
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static u8 sja1000_isa_mem_read_reg(const struct sja1000_priv *priv, int reg)
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{
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return readb(priv->reg_base + reg);
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}
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static void sja1000_isa_mem_write_reg(const struct sja1000_priv *priv,
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int reg, u8 val)
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{
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writeb(val, priv->reg_base + reg);
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}
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static u8 sja1000_isa_port_read_reg(const struct sja1000_priv *priv, int reg)
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{
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return inb((unsigned long)priv->reg_base + reg);
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}
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static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
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int reg, u8 val)
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{
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outb(val, (unsigned long)priv->reg_base + reg);
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}
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static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
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int reg)
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{
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unsigned long flags, base = (unsigned long)priv->reg_base;
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u8 readval;
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spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
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outb(reg, base);
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readval = inb(base + 1);
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spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
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return readval;
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}
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static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
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int reg, u8 val)
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{
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unsigned long flags, base = (unsigned long)priv->reg_base;
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spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
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outb(reg, base);
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outb(val, base + 1);
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spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
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}
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static int sja1000_isa_probe(struct platform_device *pdev)
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{
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struct net_device *dev;
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struct sja1000_priv *priv;
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void __iomem *base = NULL;
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int iosize = SJA1000_IOSIZE;
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int idx = pdev->id;
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int err;
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dev_dbg(&pdev->dev, "probing idx=%d: port=%#lx, mem=%#lx, irq=%d\n",
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idx, port[idx], mem[idx], irq[idx]);
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if (mem[idx]) {
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if (!request_mem_region(mem[idx], iosize, DRV_NAME)) {
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err = -EBUSY;
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goto exit;
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}
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base = ioremap_nocache(mem[idx], iosize);
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if (!base) {
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err = -ENOMEM;
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goto exit_release;
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}
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} else {
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if (indirect[idx] > 0 ||
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(indirect[idx] == -1 && indirect[0] > 0))
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iosize = SJA1000_IOSIZE_INDIRECT;
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if (!request_region(port[idx], iosize, DRV_NAME)) {
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err = -EBUSY;
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goto exit;
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}
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}
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dev = alloc_sja1000dev(0);
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if (!dev) {
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err = -ENOMEM;
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goto exit_unmap;
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}
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priv = netdev_priv(dev);
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dev->irq = irq[idx];
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priv->irq_flags = IRQF_SHARED;
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if (mem[idx]) {
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priv->reg_base = base;
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dev->base_addr = mem[idx];
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priv->read_reg = sja1000_isa_mem_read_reg;
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priv->write_reg = sja1000_isa_mem_write_reg;
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} else {
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priv->reg_base = (void __iomem *)port[idx];
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dev->base_addr = port[idx];
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if (iosize == SJA1000_IOSIZE_INDIRECT) {
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priv->read_reg = sja1000_isa_port_read_reg_indirect;
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priv->write_reg = sja1000_isa_port_write_reg_indirect;
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spin_lock_init(&indirect_lock[idx]);
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} else {
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priv->read_reg = sja1000_isa_port_read_reg;
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priv->write_reg = sja1000_isa_port_write_reg;
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}
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}
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if (clk[idx])
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priv->can.clock.freq = clk[idx] / 2;
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else if (clk[0])
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priv->can.clock.freq = clk[0] / 2;
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else
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priv->can.clock.freq = CLK_DEFAULT / 2;
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if (ocr[idx] != 0xff)
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priv->ocr = ocr[idx];
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else if (ocr[0] != 0xff)
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priv->ocr = ocr[0];
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else
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priv->ocr = OCR_DEFAULT;
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if (cdr[idx] != 0xff)
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priv->cdr = cdr[idx];
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else if (cdr[0] != 0xff)
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priv->cdr = cdr[0];
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else
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priv->cdr = CDR_DEFAULT;
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platform_set_drvdata(pdev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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dev->dev_id = idx;
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err = register_sja1000dev(dev);
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if (err) {
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dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
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DRV_NAME, err);
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goto exit_unmap;
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}
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dev_info(&pdev->dev, "%s device registered (reg_base=0x%p, irq=%d)\n",
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DRV_NAME, priv->reg_base, dev->irq);
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return 0;
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exit_unmap:
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if (mem[idx])
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iounmap(base);
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exit_release:
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if (mem[idx])
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release_mem_region(mem[idx], iosize);
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else
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release_region(port[idx], iosize);
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exit:
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return err;
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}
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static int sja1000_isa_remove(struct platform_device *pdev)
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{
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struct net_device *dev = platform_get_drvdata(pdev);
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struct sja1000_priv *priv = netdev_priv(dev);
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int idx = pdev->id;
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unregister_sja1000dev(dev);
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if (mem[idx]) {
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iounmap(priv->reg_base);
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release_mem_region(mem[idx], SJA1000_IOSIZE);
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} else {
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if (priv->read_reg == sja1000_isa_port_read_reg_indirect)
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release_region(port[idx], SJA1000_IOSIZE_INDIRECT);
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else
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release_region(port[idx], SJA1000_IOSIZE);
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}
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free_sja1000dev(dev);
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return 0;
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}
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static struct platform_driver sja1000_isa_driver = {
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.probe = sja1000_isa_probe,
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.remove = sja1000_isa_remove,
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.driver = {
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.name = DRV_NAME,
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},
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};
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static int __init sja1000_isa_init(void)
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{
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int idx, err;
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for (idx = 0; idx < MAXDEV; idx++) {
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if ((port[idx] || mem[idx]) && irq[idx]) {
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sja1000_isa_devs[idx] =
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platform_device_alloc(DRV_NAME, idx);
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if (!sja1000_isa_devs[idx]) {
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err = -ENOMEM;
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goto exit_free_devices;
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}
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err = platform_device_add(sja1000_isa_devs[idx]);
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if (err) {
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platform_device_put(sja1000_isa_devs[idx]);
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goto exit_free_devices;
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}
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pr_debug("%s: platform device %d: port=%#lx, mem=%#lx, "
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"irq=%d\n",
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DRV_NAME, idx, port[idx], mem[idx], irq[idx]);
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} else if (idx == 0 || port[idx] || mem[idx]) {
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pr_err("%s: insufficient parameters supplied\n",
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DRV_NAME);
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err = -EINVAL;
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goto exit_free_devices;
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}
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}
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err = platform_driver_register(&sja1000_isa_driver);
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if (err)
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goto exit_free_devices;
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pr_info("Legacy %s driver for max. %d devices registered\n",
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DRV_NAME, MAXDEV);
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return 0;
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exit_free_devices:
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while (--idx >= 0) {
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if (sja1000_isa_devs[idx])
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platform_device_unregister(sja1000_isa_devs[idx]);
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}
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return err;
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}
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static void __exit sja1000_isa_exit(void)
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{
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int idx;
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platform_driver_unregister(&sja1000_isa_driver);
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for (idx = 0; idx < MAXDEV; idx++) {
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if (sja1000_isa_devs[idx])
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platform_device_unregister(sja1000_isa_devs[idx]);
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}
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}
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module_init(sja1000_isa_init);
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module_exit(sja1000_isa_exit);
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