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7c151d3d5d
The ERETNC instruction, introduced in MIPS R5, is similar to the ERET one, except it does not clear the LLB bit in the LLADDR register. This feature is necessary to safely emulate R2 LL/SC instructions. However, on context switches, we need to clear the LLAddr/LLB bit in order to make sure that an SC instruction from the new thread will never succeed if it happens to interrupt an LL operation on the same address from the previous thread. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
128 lines
3.9 KiB
C
128 lines
3.9 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
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* Copyright (C) 1996 by Paul M. Antoine
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* Copyright (C) 1999 Silicon Graphics
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* Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc.
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*/
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#ifndef _ASM_SWITCH_TO_H
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#define _ASM_SWITCH_TO_H
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#include <asm/cpu-features.h>
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#include <asm/watch.h>
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#include <asm/dsp.h>
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#include <asm/cop2.h>
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#include <asm/msa.h>
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struct task_struct;
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enum {
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FP_SAVE_NONE = 0,
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FP_SAVE_VECTOR = -1,
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FP_SAVE_SCALAR = 1,
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};
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/**
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* resume - resume execution of a task
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* @prev: The task previously executed.
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* @next: The task to begin executing.
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* @next_ti: task_thread_info(next).
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* @fp_save: Which, if any, FP context to save for prev.
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*
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* This function is used whilst scheduling to save the context of prev & load
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* the context of next. Returns prev.
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*/
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extern asmlinkage struct task_struct *resume(struct task_struct *prev,
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struct task_struct *next, struct thread_info *next_ti,
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s32 fp_save);
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extern unsigned int ll_bit;
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extern struct task_struct *ll_task;
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#ifdef CONFIG_MIPS_MT_FPAFF
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/*
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* Handle the scheduler resume end of FPU affinity management. We do this
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* inline to try to keep the overhead down. If we have been forced to run on
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* a "CPU" with an FPU because of a previous high level of FP computation,
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* but did not actually use the FPU during the most recent time-slice (CU1
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* isn't set), we undo the restriction on cpus_allowed.
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*
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* We're not calling set_cpus_allowed() here, because we have no need to
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* force prompt migration - we're already switching the current CPU to a
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* different thread.
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*/
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#define __mips_mt_fpaff_switch_to(prev) \
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do { \
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struct thread_info *__prev_ti = task_thread_info(prev); \
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\
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if (cpu_has_fpu && \
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test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
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(!(KSTK_STATUS(prev) & ST0_CU1))) { \
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clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
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prev->cpus_allowed = prev->thread.user_cpus_allowed; \
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} \
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next->thread.emulated_fp = 0; \
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} while(0)
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#else
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#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
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#endif
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#define __clear_software_ll_bit() \
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do { if (cpu_has_rw_llb) { \
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write_c0_lladdr(0); \
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} else { \
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if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc)\
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ll_bit = 0; \
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} \
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} while (0)
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#define switch_to(prev, next, last) \
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do { \
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u32 __c0_stat; \
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s32 __fpsave = FP_SAVE_NONE; \
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__mips_mt_fpaff_switch_to(prev); \
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if (cpu_has_dsp) \
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__save_dsp(prev); \
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if (cop2_present && (KSTK_STATUS(prev) & ST0_CU2)) { \
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if (cop2_lazy_restore) \
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KSTK_STATUS(prev) &= ~ST0_CU2; \
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__c0_stat = read_c0_status(); \
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write_c0_status(__c0_stat | ST0_CU2); \
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cop2_save(prev); \
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write_c0_status(__c0_stat & ~ST0_CU2); \
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} \
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__clear_software_ll_bit(); \
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if (test_and_clear_tsk_thread_flag(prev, TIF_USEDFPU)) \
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__fpsave = FP_SAVE_SCALAR; \
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if (test_and_clear_tsk_thread_flag(prev, TIF_USEDMSA)) \
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__fpsave = FP_SAVE_VECTOR; \
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(last) = resume(prev, next, task_thread_info(next), __fpsave); \
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disable_msa(); \
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} while (0)
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#define finish_arch_switch(prev) \
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do { \
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u32 __c0_stat; \
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if (cop2_present && !cop2_lazy_restore && \
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(KSTK_STATUS(current) & ST0_CU2)) { \
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__c0_stat = read_c0_status(); \
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write_c0_status(__c0_stat | ST0_CU2); \
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cop2_restore(current); \
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write_c0_status(__c0_stat & ~ST0_CU2); \
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} \
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if (cpu_has_dsp) \
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__restore_dsp(current); \
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if (cpu_has_userlocal) \
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write_c0_userlocal(current_thread_info()->tp_value); \
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__restore_watch(); \
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} while (0)
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#endif /* _ASM_SWITCH_TO_H */
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