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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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47ebe00b68
- Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdLKxYAAoJEHwUBw8lI4NHsH8P/AqYZpUlLthe5L4qItzM1Uf0 HqxsJYs0xworjSRml8uptx/TzjIgJnJfEk2PV5VA+0zJNz/HnH7lDH85wKDx1Ydl AatUuyAFRO3GZOup/hY0AEIPhoIMdg/3zS2aapjJmaEZCVK2eVKmcj0KMvO5g0cw tsmXm3O0xd2Na1ToslNyYgFfCn8ortuAeoKiXJxhivMbGjRfw4LW/RPgS17Vspvh mEuxNXFWAZ+DorgPF5BmDPZ+LXcGgCXGNIoj64W+VHaXU5yXnlky+6/0f7cEcFEd yl3hjXVwyAq5zIItIOmiuozZidi5yfoizXg4S2ZD3P4xXKZ5OZ9Gf/0SMyXUIErU pwGxo6ZgsBcEpAHtqySELQedttttID+jYYeWU6oDr2LOy3W3F7AHOEGg9l9ZllLh gRdIoz3PrMK1wy/9Ytl37xklZyBk+HJLkeoIAvjrNgNJ1YRKqcysUCwsmqO7SG3N HnIGx74sG8ChljT/yX5pElq3ip6qLdb4pJcsfxKJ9VSxsTZ3JNINGNQtvI19hKR/ 6sn/c1Rb5/S1WxINGr+2FxChxXF8OESCN6GIEu6mNYVBzQnNPzwgPxfAGCqdoOOH mqXXgYNePMaBGYXBkdgvP1CnqenRRmTYo/1L4QmI4Mve4xpd5zhx5cZt9FlQJ2Im /hVT8gZ6bIrutsVOy4rg =R+aC -----END PGP SIGNATURE----- Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: - Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback Documentation: dmaengine: clean up description of dmatest usage dmaengine: tegra210-adma: remove PM_CLK dependency dmaengine: fsl-edma: add i.mx7ulp edma2 version support dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma dmaengine: fsl-edma-common: version check for v2 instead dmaengine: fsl-edma-common: move dmamux register to another single function dmaengine: fsl-edma: add drvdata for fsl-edma dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" dmaengine: rcar-dmac: Reject zero-length slave DMA requests dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw-edma: fix semicolon.cocci warnings dmaengine: sh: usb-dmac: Use [] to denote a flexible array member dmaengine: dmatest: timeout value of -1 should specify infinite wait dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit dmaengine: fsl-edma: support little endian for edma driver dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" dmagengine: pl330: add code to get reset property dt-bindings: pl330: document the optional resets property ...
1378 lines
34 KiB
C
1378 lines
34 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
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*/
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/*
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* This code implements the DMA subsystem. It provides a HW-neutral interface
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* for other kernel code to use asynchronous memory copy capabilities,
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* if present, and allows different HW DMA drivers to register as providing
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* this capability.
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*
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* Due to the fact we are accelerating what is already a relatively fast
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* operation, the code goes to great lengths to avoid additional overhead,
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* such as locking.
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*
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* LOCKING:
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*
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* The subsystem keeps a global list of dma_device structs it is protected by a
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* mutex, dma_list_mutex.
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*
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* A subsystem can get access to a channel by calling dmaengine_get() followed
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* by dma_find_channel(), or if it has need for an exclusive channel it can call
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* dma_request_channel(). Once a channel is allocated a reference is taken
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* against its corresponding driver to disable removal.
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*
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* Each device has a channels list, which runs unlocked but is never modified
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* once the device is registered, it's just setup by the driver.
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*
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* See Documentation/driver-api/dmaengine for more details
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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#include <linux/hardirq.h>
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#include <linux/spinlock.h>
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#include <linux/percpu.h>
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#include <linux/rcupdate.h>
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#include <linux/mutex.h>
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#include <linux/jiffies.h>
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#include <linux/rculist.h>
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#include <linux/idr.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/acpi_dma.h>
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#include <linux/of_dma.h>
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#include <linux/mempool.h>
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#include <linux/numa.h>
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static DEFINE_MUTEX(dma_list_mutex);
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static DEFINE_IDA(dma_ida);
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static LIST_HEAD(dma_device_list);
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static long dmaengine_ref_count;
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/* --- sysfs implementation --- */
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/**
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* dev_to_dma_chan - convert a device pointer to its sysfs container object
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* @dev - device node
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*
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* Must be called under dma_list_mutex
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*/
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static struct dma_chan *dev_to_dma_chan(struct device *dev)
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{
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struct dma_chan_dev *chan_dev;
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chan_dev = container_of(dev, typeof(*chan_dev), device);
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return chan_dev->chan;
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}
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static ssize_t memcpy_count_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct dma_chan *chan;
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unsigned long count = 0;
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int i;
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int err;
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mutex_lock(&dma_list_mutex);
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chan = dev_to_dma_chan(dev);
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if (chan) {
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for_each_possible_cpu(i)
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count += per_cpu_ptr(chan->local, i)->memcpy_count;
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err = sprintf(buf, "%lu\n", count);
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} else
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err = -ENODEV;
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mutex_unlock(&dma_list_mutex);
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return err;
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}
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static DEVICE_ATTR_RO(memcpy_count);
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static ssize_t bytes_transferred_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct dma_chan *chan;
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unsigned long count = 0;
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int i;
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int err;
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mutex_lock(&dma_list_mutex);
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chan = dev_to_dma_chan(dev);
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if (chan) {
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for_each_possible_cpu(i)
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count += per_cpu_ptr(chan->local, i)->bytes_transferred;
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err = sprintf(buf, "%lu\n", count);
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} else
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err = -ENODEV;
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mutex_unlock(&dma_list_mutex);
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return err;
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}
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static DEVICE_ATTR_RO(bytes_transferred);
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static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct dma_chan *chan;
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int err;
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mutex_lock(&dma_list_mutex);
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chan = dev_to_dma_chan(dev);
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if (chan)
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err = sprintf(buf, "%d\n", chan->client_count);
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else
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err = -ENODEV;
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mutex_unlock(&dma_list_mutex);
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return err;
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}
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static DEVICE_ATTR_RO(in_use);
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static struct attribute *dma_dev_attrs[] = {
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&dev_attr_memcpy_count.attr,
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&dev_attr_bytes_transferred.attr,
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&dev_attr_in_use.attr,
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NULL,
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};
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ATTRIBUTE_GROUPS(dma_dev);
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static void chan_dev_release(struct device *dev)
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{
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struct dma_chan_dev *chan_dev;
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chan_dev = container_of(dev, typeof(*chan_dev), device);
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if (atomic_dec_and_test(chan_dev->idr_ref)) {
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ida_free(&dma_ida, chan_dev->dev_id);
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kfree(chan_dev->idr_ref);
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}
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kfree(chan_dev);
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}
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static struct class dma_devclass = {
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.name = "dma",
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.dev_groups = dma_dev_groups,
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.dev_release = chan_dev_release,
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};
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/* --- client and device registration --- */
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#define dma_device_satisfies_mask(device, mask) \
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__dma_device_satisfies_mask((device), &(mask))
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static int
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__dma_device_satisfies_mask(struct dma_device *device,
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const dma_cap_mask_t *want)
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{
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dma_cap_mask_t has;
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bitmap_and(has.bits, want->bits, device->cap_mask.bits,
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DMA_TX_TYPE_END);
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return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
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}
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static struct module *dma_chan_to_owner(struct dma_chan *chan)
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{
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return chan->device->dev->driver->owner;
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}
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/**
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* balance_ref_count - catch up the channel reference count
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* @chan - channel to balance ->client_count versus dmaengine_ref_count
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*
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* balance_ref_count must be called under dma_list_mutex
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*/
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static void balance_ref_count(struct dma_chan *chan)
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{
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struct module *owner = dma_chan_to_owner(chan);
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while (chan->client_count < dmaengine_ref_count) {
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__module_get(owner);
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chan->client_count++;
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}
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}
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/**
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* dma_chan_get - try to grab a dma channel's parent driver module
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* @chan - channel to grab
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*
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* Must be called under dma_list_mutex
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*/
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static int dma_chan_get(struct dma_chan *chan)
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{
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struct module *owner = dma_chan_to_owner(chan);
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int ret;
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/* The channel is already in use, update client count */
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if (chan->client_count) {
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__module_get(owner);
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goto out;
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}
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if (!try_module_get(owner))
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return -ENODEV;
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/* allocate upon first client reference */
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if (chan->device->device_alloc_chan_resources) {
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ret = chan->device->device_alloc_chan_resources(chan);
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if (ret < 0)
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goto err_out;
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}
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if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
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balance_ref_count(chan);
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out:
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chan->client_count++;
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return 0;
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err_out:
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module_put(owner);
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return ret;
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}
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/**
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* dma_chan_put - drop a reference to a dma channel's parent driver module
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* @chan - channel to release
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*
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* Must be called under dma_list_mutex
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*/
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static void dma_chan_put(struct dma_chan *chan)
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{
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/* This channel is not in use, bail out */
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if (!chan->client_count)
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return;
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chan->client_count--;
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module_put(dma_chan_to_owner(chan));
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/* This channel is not in use anymore, free it */
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if (!chan->client_count && chan->device->device_free_chan_resources) {
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/* Make sure all operations have completed */
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dmaengine_synchronize(chan);
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chan->device->device_free_chan_resources(chan);
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}
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/* If the channel is used via a DMA request router, free the mapping */
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if (chan->router && chan->router->route_free) {
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chan->router->route_free(chan->router->dev, chan->route_data);
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chan->router = NULL;
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chan->route_data = NULL;
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}
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}
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enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
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{
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enum dma_status status;
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unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
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dma_async_issue_pending(chan);
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do {
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status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
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if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
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dev_err(chan->device->dev, "%s: timeout!\n", __func__);
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return DMA_ERROR;
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}
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if (status != DMA_IN_PROGRESS)
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break;
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cpu_relax();
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} while (1);
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return status;
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}
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EXPORT_SYMBOL(dma_sync_wait);
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/**
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* dma_cap_mask_all - enable iteration over all operation types
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*/
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static dma_cap_mask_t dma_cap_mask_all;
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/**
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* dma_chan_tbl_ent - tracks channel allocations per core/operation
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* @chan - associated channel for this entry
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*/
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struct dma_chan_tbl_ent {
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struct dma_chan *chan;
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};
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/**
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* channel_table - percpu lookup table for memory-to-memory offload providers
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*/
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static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
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static int __init dma_channel_table_init(void)
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{
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enum dma_transaction_type cap;
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int err = 0;
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bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
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/* 'interrupt', 'private', and 'slave' are channel capabilities,
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* but are not associated with an operation so they do not need
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* an entry in the channel_table
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*/
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clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
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clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
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clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
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for_each_dma_cap_mask(cap, dma_cap_mask_all) {
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channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
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if (!channel_table[cap]) {
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err = -ENOMEM;
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break;
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}
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}
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if (err) {
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pr_err("initialization failure\n");
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
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free_percpu(channel_table[cap]);
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}
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return err;
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}
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arch_initcall(dma_channel_table_init);
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/**
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* dma_find_channel - find a channel to carry out the operation
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* @tx_type: transaction type
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*/
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struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
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{
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return this_cpu_read(channel_table[tx_type]->chan);
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}
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EXPORT_SYMBOL(dma_find_channel);
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/**
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* dma_issue_pending_all - flush all pending operations across all channels
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*/
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void dma_issue_pending_all(void)
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{
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struct dma_device *device;
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struct dma_chan *chan;
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rcu_read_lock();
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list_for_each_entry_rcu(device, &dma_device_list, global_node) {
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if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
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continue;
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list_for_each_entry(chan, &device->channels, device_node)
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if (chan->client_count)
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device->device_issue_pending(chan);
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}
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rcu_read_unlock();
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}
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EXPORT_SYMBOL(dma_issue_pending_all);
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/**
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* dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
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*/
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static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
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{
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int node = dev_to_node(chan->device->dev);
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return node == NUMA_NO_NODE ||
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cpumask_test_cpu(cpu, cpumask_of_node(node));
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}
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/**
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* min_chan - returns the channel with min count and in the same numa-node as the cpu
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* @cap: capability to match
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* @cpu: cpu index which the channel should be close to
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*
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* If some channels are close to the given cpu, the one with the lowest
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* reference count is returned. Otherwise, cpu is ignored and only the
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* reference count is taken into account.
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* Must be called under dma_list_mutex.
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*/
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static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
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{
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struct dma_device *device;
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struct dma_chan *chan;
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struct dma_chan *min = NULL;
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struct dma_chan *localmin = NULL;
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list_for_each_entry(device, &dma_device_list, global_node) {
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if (!dma_has_cap(cap, device->cap_mask) ||
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dma_has_cap(DMA_PRIVATE, device->cap_mask))
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continue;
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list_for_each_entry(chan, &device->channels, device_node) {
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if (!chan->client_count)
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continue;
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if (!min || chan->table_count < min->table_count)
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min = chan;
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if (dma_chan_is_local(chan, cpu))
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if (!localmin ||
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chan->table_count < localmin->table_count)
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localmin = chan;
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}
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}
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chan = localmin ? localmin : min;
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|
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if (chan)
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chan->table_count++;
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return chan;
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}
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|
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/**
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* dma_channel_rebalance - redistribute the available channels
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*
|
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* Optimize for cpu isolation (each cpu gets a dedicated channel for an
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* operation type) in the SMP case, and operation isolation (avoid
|
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* multi-tasking channels) in the non-SMP case. Must be called under
|
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* dma_list_mutex.
|
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*/
|
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static void dma_channel_rebalance(void)
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{
|
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struct dma_chan *chan;
|
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struct dma_device *device;
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int cpu;
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int cap;
|
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|
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/* undo the last distribution */
|
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for_each_dma_cap_mask(cap, dma_cap_mask_all)
|
|
for_each_possible_cpu(cpu)
|
|
per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
|
|
|
|
list_for_each_entry(device, &dma_device_list, global_node) {
|
|
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
|
|
continue;
|
|
list_for_each_entry(chan, &device->channels, device_node)
|
|
chan->table_count = 0;
|
|
}
|
|
|
|
/* don't populate the channel_table if no clients are available */
|
|
if (!dmaengine_ref_count)
|
|
return;
|
|
|
|
/* redistribute available channels */
|
|
for_each_dma_cap_mask(cap, dma_cap_mask_all)
|
|
for_each_online_cpu(cpu) {
|
|
chan = min_chan(cap, cpu);
|
|
per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
|
|
}
|
|
}
|
|
|
|
int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
|
|
{
|
|
struct dma_device *device;
|
|
|
|
if (!chan || !caps)
|
|
return -EINVAL;
|
|
|
|
device = chan->device;
|
|
|
|
/* check if the channel supports slave transactions */
|
|
if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
|
|
test_bit(DMA_CYCLIC, device->cap_mask.bits)))
|
|
return -ENXIO;
|
|
|
|
/*
|
|
* Check whether it reports it uses the generic slave
|
|
* capabilities, if not, that means it doesn't support any
|
|
* kind of slave capabilities reporting.
|
|
*/
|
|
if (!device->directions)
|
|
return -ENXIO;
|
|
|
|
caps->src_addr_widths = device->src_addr_widths;
|
|
caps->dst_addr_widths = device->dst_addr_widths;
|
|
caps->directions = device->directions;
|
|
caps->max_burst = device->max_burst;
|
|
caps->residue_granularity = device->residue_granularity;
|
|
caps->descriptor_reuse = device->descriptor_reuse;
|
|
caps->cmd_pause = !!device->device_pause;
|
|
caps->cmd_resume = !!device->device_resume;
|
|
caps->cmd_terminate = !!device->device_terminate_all;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_get_slave_caps);
|
|
|
|
static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
|
|
struct dma_device *dev,
|
|
dma_filter_fn fn, void *fn_param)
|
|
{
|
|
struct dma_chan *chan;
|
|
|
|
if (mask && !__dma_device_satisfies_mask(dev, mask)) {
|
|
dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
|
|
return NULL;
|
|
}
|
|
/* devices with multiple channels need special handling as we need to
|
|
* ensure that all channels are either private or public.
|
|
*/
|
|
if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
|
|
list_for_each_entry(chan, &dev->channels, device_node) {
|
|
/* some channels are already publicly allocated */
|
|
if (chan->client_count)
|
|
return NULL;
|
|
}
|
|
|
|
list_for_each_entry(chan, &dev->channels, device_node) {
|
|
if (chan->client_count) {
|
|
dev_dbg(dev->dev, "%s: %s busy\n",
|
|
__func__, dma_chan_name(chan));
|
|
continue;
|
|
}
|
|
if (fn && !fn(chan, fn_param)) {
|
|
dev_dbg(dev->dev, "%s: %s filter said false\n",
|
|
__func__, dma_chan_name(chan));
|
|
continue;
|
|
}
|
|
return chan;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static struct dma_chan *find_candidate(struct dma_device *device,
|
|
const dma_cap_mask_t *mask,
|
|
dma_filter_fn fn, void *fn_param)
|
|
{
|
|
struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
|
|
int err;
|
|
|
|
if (chan) {
|
|
/* Found a suitable channel, try to grab, prep, and return it.
|
|
* We first set DMA_PRIVATE to disable balance_ref_count as this
|
|
* channel will not be published in the general-purpose
|
|
* allocator
|
|
*/
|
|
dma_cap_set(DMA_PRIVATE, device->cap_mask);
|
|
device->privatecnt++;
|
|
err = dma_chan_get(chan);
|
|
|
|
if (err) {
|
|
if (err == -ENODEV) {
|
|
dev_dbg(device->dev, "%s: %s module removed\n",
|
|
__func__, dma_chan_name(chan));
|
|
list_del_rcu(&device->global_node);
|
|
} else
|
|
dev_dbg(device->dev,
|
|
"%s: failed to get %s: (%d)\n",
|
|
__func__, dma_chan_name(chan), err);
|
|
|
|
if (--device->privatecnt == 0)
|
|
dma_cap_clear(DMA_PRIVATE, device->cap_mask);
|
|
|
|
chan = ERR_PTR(err);
|
|
}
|
|
}
|
|
|
|
return chan ? chan : ERR_PTR(-EPROBE_DEFER);
|
|
}
|
|
|
|
/**
|
|
* dma_get_slave_channel - try to get specific channel exclusively
|
|
* @chan: target channel
|
|
*/
|
|
struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
|
|
{
|
|
int err = -EBUSY;
|
|
|
|
/* lock against __dma_request_channel */
|
|
mutex_lock(&dma_list_mutex);
|
|
|
|
if (chan->client_count == 0) {
|
|
struct dma_device *device = chan->device;
|
|
|
|
dma_cap_set(DMA_PRIVATE, device->cap_mask);
|
|
device->privatecnt++;
|
|
err = dma_chan_get(chan);
|
|
if (err) {
|
|
dev_dbg(chan->device->dev,
|
|
"%s: failed to get %s: (%d)\n",
|
|
__func__, dma_chan_name(chan), err);
|
|
chan = NULL;
|
|
if (--device->privatecnt == 0)
|
|
dma_cap_clear(DMA_PRIVATE, device->cap_mask);
|
|
}
|
|
} else
|
|
chan = NULL;
|
|
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
|
|
return chan;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_get_slave_channel);
|
|
|
|
struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
|
|
{
|
|
dma_cap_mask_t mask;
|
|
struct dma_chan *chan;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_SLAVE, mask);
|
|
|
|
/* lock against __dma_request_channel */
|
|
mutex_lock(&dma_list_mutex);
|
|
|
|
chan = find_candidate(device, &mask, NULL, NULL);
|
|
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
return IS_ERR(chan) ? NULL : chan;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
|
|
|
|
/**
|
|
* __dma_request_channel - try to allocate an exclusive channel
|
|
* @mask: capabilities that the channel must satisfy
|
|
* @fn: optional callback to disposition available channels
|
|
* @fn_param: opaque parameter to pass to dma_filter_fn
|
|
* @np: device node to look for DMA channels
|
|
*
|
|
* Returns pointer to appropriate DMA channel on success or NULL.
|
|
*/
|
|
struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
|
|
dma_filter_fn fn, void *fn_param,
|
|
struct device_node *np)
|
|
{
|
|
struct dma_device *device, *_d;
|
|
struct dma_chan *chan = NULL;
|
|
|
|
/* Find a channel */
|
|
mutex_lock(&dma_list_mutex);
|
|
list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
|
|
/* Finds a DMA controller with matching device node */
|
|
if (np && device->dev->of_node && np != device->dev->of_node)
|
|
continue;
|
|
|
|
chan = find_candidate(device, mask, fn, fn_param);
|
|
if (!IS_ERR(chan))
|
|
break;
|
|
|
|
chan = NULL;
|
|
}
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
pr_debug("%s: %s (%s)\n",
|
|
__func__,
|
|
chan ? "success" : "fail",
|
|
chan ? dma_chan_name(chan) : NULL);
|
|
|
|
return chan;
|
|
}
|
|
EXPORT_SYMBOL_GPL(__dma_request_channel);
|
|
|
|
static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
|
|
const char *name,
|
|
struct device *dev)
|
|
{
|
|
int i;
|
|
|
|
if (!device->filter.mapcnt)
|
|
return NULL;
|
|
|
|
for (i = 0; i < device->filter.mapcnt; i++) {
|
|
const struct dma_slave_map *map = &device->filter.map[i];
|
|
|
|
if (!strcmp(map->devname, dev_name(dev)) &&
|
|
!strcmp(map->slave, name))
|
|
return map;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* dma_request_chan - try to allocate an exclusive slave channel
|
|
* @dev: pointer to client device structure
|
|
* @name: slave channel name
|
|
*
|
|
* Returns pointer to appropriate DMA channel on success or an error pointer.
|
|
*/
|
|
struct dma_chan *dma_request_chan(struct device *dev, const char *name)
|
|
{
|
|
struct dma_device *d, *_d;
|
|
struct dma_chan *chan = NULL;
|
|
|
|
/* If device-tree is present get slave info from here */
|
|
if (dev->of_node)
|
|
chan = of_dma_request_slave_channel(dev->of_node, name);
|
|
|
|
/* If device was enumerated by ACPI get slave info from here */
|
|
if (has_acpi_companion(dev) && !chan)
|
|
chan = acpi_dma_request_slave_chan_by_name(dev, name);
|
|
|
|
if (chan) {
|
|
/* Valid channel found or requester needs to be deferred */
|
|
if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER)
|
|
return chan;
|
|
}
|
|
|
|
/* Try to find the channel via the DMA filter map(s) */
|
|
mutex_lock(&dma_list_mutex);
|
|
list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
|
|
dma_cap_mask_t mask;
|
|
const struct dma_slave_map *map = dma_filter_match(d, name, dev);
|
|
|
|
if (!map)
|
|
continue;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_SLAVE, mask);
|
|
|
|
chan = find_candidate(d, &mask, d->filter.fn, map->param);
|
|
if (!IS_ERR(chan))
|
|
break;
|
|
}
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
return chan ? chan : ERR_PTR(-EPROBE_DEFER);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_request_chan);
|
|
|
|
/**
|
|
* dma_request_slave_channel - try to allocate an exclusive slave channel
|
|
* @dev: pointer to client device structure
|
|
* @name: slave channel name
|
|
*
|
|
* Returns pointer to appropriate DMA channel on success or NULL.
|
|
*/
|
|
struct dma_chan *dma_request_slave_channel(struct device *dev,
|
|
const char *name)
|
|
{
|
|
struct dma_chan *ch = dma_request_chan(dev, name);
|
|
if (IS_ERR(ch))
|
|
return NULL;
|
|
|
|
return ch;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_request_slave_channel);
|
|
|
|
/**
|
|
* dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
|
|
* @mask: capabilities that the channel must satisfy
|
|
*
|
|
* Returns pointer to appropriate DMA channel on success or an error pointer.
|
|
*/
|
|
struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
|
|
{
|
|
struct dma_chan *chan;
|
|
|
|
if (!mask)
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
chan = __dma_request_channel(mask, NULL, NULL, NULL);
|
|
if (!chan) {
|
|
mutex_lock(&dma_list_mutex);
|
|
if (list_empty(&dma_device_list))
|
|
chan = ERR_PTR(-EPROBE_DEFER);
|
|
else
|
|
chan = ERR_PTR(-ENODEV);
|
|
mutex_unlock(&dma_list_mutex);
|
|
}
|
|
|
|
return chan;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
|
|
|
|
void dma_release_channel(struct dma_chan *chan)
|
|
{
|
|
mutex_lock(&dma_list_mutex);
|
|
WARN_ONCE(chan->client_count != 1,
|
|
"chan reference count %d != 1\n", chan->client_count);
|
|
dma_chan_put(chan);
|
|
/* drop PRIVATE cap enabled by __dma_request_channel() */
|
|
if (--chan->device->privatecnt == 0)
|
|
dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
|
|
mutex_unlock(&dma_list_mutex);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_release_channel);
|
|
|
|
/**
|
|
* dmaengine_get - register interest in dma_channels
|
|
*/
|
|
void dmaengine_get(void)
|
|
{
|
|
struct dma_device *device, *_d;
|
|
struct dma_chan *chan;
|
|
int err;
|
|
|
|
mutex_lock(&dma_list_mutex);
|
|
dmaengine_ref_count++;
|
|
|
|
/* try to grab channels */
|
|
list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
|
|
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
|
|
continue;
|
|
list_for_each_entry(chan, &device->channels, device_node) {
|
|
err = dma_chan_get(chan);
|
|
if (err == -ENODEV) {
|
|
/* module removed before we could use it */
|
|
list_del_rcu(&device->global_node);
|
|
break;
|
|
} else if (err)
|
|
dev_dbg(chan->device->dev,
|
|
"%s: failed to get %s: (%d)\n",
|
|
__func__, dma_chan_name(chan), err);
|
|
}
|
|
}
|
|
|
|
/* if this is the first reference and there were channels
|
|
* waiting we need to rebalance to get those channels
|
|
* incorporated into the channel table
|
|
*/
|
|
if (dmaengine_ref_count == 1)
|
|
dma_channel_rebalance();
|
|
mutex_unlock(&dma_list_mutex);
|
|
}
|
|
EXPORT_SYMBOL(dmaengine_get);
|
|
|
|
/**
|
|
* dmaengine_put - let dma drivers be removed when ref_count == 0
|
|
*/
|
|
void dmaengine_put(void)
|
|
{
|
|
struct dma_device *device;
|
|
struct dma_chan *chan;
|
|
|
|
mutex_lock(&dma_list_mutex);
|
|
dmaengine_ref_count--;
|
|
BUG_ON(dmaengine_ref_count < 0);
|
|
/* drop channel references */
|
|
list_for_each_entry(device, &dma_device_list, global_node) {
|
|
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
|
|
continue;
|
|
list_for_each_entry(chan, &device->channels, device_node)
|
|
dma_chan_put(chan);
|
|
}
|
|
mutex_unlock(&dma_list_mutex);
|
|
}
|
|
EXPORT_SYMBOL(dmaengine_put);
|
|
|
|
static bool device_has_all_tx_types(struct dma_device *device)
|
|
{
|
|
/* A device that satisfies this test has channels that will never cause
|
|
* an async_tx channel switch event as all possible operation types can
|
|
* be handled.
|
|
*/
|
|
#ifdef CONFIG_ASYNC_TX_DMA
|
|
if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
|
|
return false;
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
|
|
if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
|
|
return false;
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_ASYNC_XOR)
|
|
if (!dma_has_cap(DMA_XOR, device->cap_mask))
|
|
return false;
|
|
|
|
#ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
|
|
if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
|
|
return false;
|
|
#endif
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_ASYNC_PQ)
|
|
if (!dma_has_cap(DMA_PQ, device->cap_mask))
|
|
return false;
|
|
|
|
#ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
|
|
if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
|
|
return false;
|
|
#endif
|
|
#endif
|
|
|
|
return true;
|
|
}
|
|
|
|
static int get_dma_id(struct dma_device *device)
|
|
{
|
|
int rc = ida_alloc(&dma_ida, GFP_KERNEL);
|
|
|
|
if (rc < 0)
|
|
return rc;
|
|
device->dev_id = rc;
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* dma_async_device_register - registers DMA devices found
|
|
* @device: &dma_device
|
|
*/
|
|
int dma_async_device_register(struct dma_device *device)
|
|
{
|
|
int chancnt = 0, rc;
|
|
struct dma_chan* chan;
|
|
atomic_t *idr_ref;
|
|
|
|
if (!device)
|
|
return -ENODEV;
|
|
|
|
/* validate device routines */
|
|
if (!device->dev) {
|
|
pr_err("DMAdevice must have dev\n");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_MEMCPY");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_XOR");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_XOR_VAL");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_PQ");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_PQ_VAL");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_MEMSET");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_INTERRUPT");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_CYCLIC");
|
|
return -EIO;
|
|
}
|
|
|
|
if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) {
|
|
dev_err(device->dev,
|
|
"Device claims capability %s, but op is not defined\n",
|
|
"DMA_INTERLEAVE");
|
|
return -EIO;
|
|
}
|
|
|
|
|
|
if (!device->device_tx_status) {
|
|
dev_err(device->dev, "Device tx_status is not defined\n");
|
|
return -EIO;
|
|
}
|
|
|
|
|
|
if (!device->device_issue_pending) {
|
|
dev_err(device->dev, "Device issue_pending is not defined\n");
|
|
return -EIO;
|
|
}
|
|
|
|
/* note: this only matters in the
|
|
* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
|
|
*/
|
|
if (device_has_all_tx_types(device))
|
|
dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
|
|
|
|
idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
|
|
if (!idr_ref)
|
|
return -ENOMEM;
|
|
rc = get_dma_id(device);
|
|
if (rc != 0) {
|
|
kfree(idr_ref);
|
|
return rc;
|
|
}
|
|
|
|
atomic_set(idr_ref, 0);
|
|
|
|
/* represent channels in sysfs. Probably want devs too */
|
|
list_for_each_entry(chan, &device->channels, device_node) {
|
|
rc = -ENOMEM;
|
|
chan->local = alloc_percpu(typeof(*chan->local));
|
|
if (chan->local == NULL)
|
|
goto err_out;
|
|
chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
|
|
if (chan->dev == NULL) {
|
|
free_percpu(chan->local);
|
|
chan->local = NULL;
|
|
goto err_out;
|
|
}
|
|
|
|
chan->chan_id = chancnt++;
|
|
chan->dev->device.class = &dma_devclass;
|
|
chan->dev->device.parent = device->dev;
|
|
chan->dev->chan = chan;
|
|
chan->dev->idr_ref = idr_ref;
|
|
chan->dev->dev_id = device->dev_id;
|
|
atomic_inc(idr_ref);
|
|
dev_set_name(&chan->dev->device, "dma%dchan%d",
|
|
device->dev_id, chan->chan_id);
|
|
|
|
rc = device_register(&chan->dev->device);
|
|
if (rc) {
|
|
free_percpu(chan->local);
|
|
chan->local = NULL;
|
|
kfree(chan->dev);
|
|
atomic_dec(idr_ref);
|
|
goto err_out;
|
|
}
|
|
chan->client_count = 0;
|
|
}
|
|
|
|
if (!chancnt) {
|
|
dev_err(device->dev, "%s: device has no channels!\n", __func__);
|
|
rc = -ENODEV;
|
|
goto err_out;
|
|
}
|
|
|
|
device->chancnt = chancnt;
|
|
|
|
mutex_lock(&dma_list_mutex);
|
|
/* take references on public channels */
|
|
if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
|
|
list_for_each_entry(chan, &device->channels, device_node) {
|
|
/* if clients are already waiting for channels we need
|
|
* to take references on their behalf
|
|
*/
|
|
if (dma_chan_get(chan) == -ENODEV) {
|
|
/* note we can only get here for the first
|
|
* channel as the remaining channels are
|
|
* guaranteed to get a reference
|
|
*/
|
|
rc = -ENODEV;
|
|
mutex_unlock(&dma_list_mutex);
|
|
goto err_out;
|
|
}
|
|
}
|
|
list_add_tail_rcu(&device->global_node, &dma_device_list);
|
|
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
|
|
device->privatecnt++; /* Always private */
|
|
dma_channel_rebalance();
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
/* if we never registered a channel just release the idr */
|
|
if (atomic_read(idr_ref) == 0) {
|
|
ida_free(&dma_ida, device->dev_id);
|
|
kfree(idr_ref);
|
|
return rc;
|
|
}
|
|
|
|
list_for_each_entry(chan, &device->channels, device_node) {
|
|
if (chan->local == NULL)
|
|
continue;
|
|
mutex_lock(&dma_list_mutex);
|
|
chan->dev->chan = NULL;
|
|
mutex_unlock(&dma_list_mutex);
|
|
device_unregister(&chan->dev->device);
|
|
free_percpu(chan->local);
|
|
}
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(dma_async_device_register);
|
|
|
|
/**
|
|
* dma_async_device_unregister - unregister a DMA device
|
|
* @device: &dma_device
|
|
*
|
|
* This routine is called by dma driver exit routines, dmaengine holds module
|
|
* references to prevent it being called while channels are in use.
|
|
*/
|
|
void dma_async_device_unregister(struct dma_device *device)
|
|
{
|
|
struct dma_chan *chan;
|
|
|
|
mutex_lock(&dma_list_mutex);
|
|
list_del_rcu(&device->global_node);
|
|
dma_channel_rebalance();
|
|
mutex_unlock(&dma_list_mutex);
|
|
|
|
list_for_each_entry(chan, &device->channels, device_node) {
|
|
WARN_ONCE(chan->client_count,
|
|
"%s called while %d clients hold a reference\n",
|
|
__func__, chan->client_count);
|
|
mutex_lock(&dma_list_mutex);
|
|
chan->dev->chan = NULL;
|
|
mutex_unlock(&dma_list_mutex);
|
|
device_unregister(&chan->dev->device);
|
|
free_percpu(chan->local);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(dma_async_device_unregister);
|
|
|
|
static void dmam_device_release(struct device *dev, void *res)
|
|
{
|
|
struct dma_device *device;
|
|
|
|
device = *(struct dma_device **)res;
|
|
dma_async_device_unregister(device);
|
|
}
|
|
|
|
/**
|
|
* dmaenginem_async_device_register - registers DMA devices found
|
|
* @device: &dma_device
|
|
*
|
|
* The operation is managed and will be undone on driver detach.
|
|
*/
|
|
int dmaenginem_async_device_register(struct dma_device *device)
|
|
{
|
|
void *p;
|
|
int ret;
|
|
|
|
p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL);
|
|
if (!p)
|
|
return -ENOMEM;
|
|
|
|
ret = dma_async_device_register(device);
|
|
if (!ret) {
|
|
*(struct dma_device **)p = device;
|
|
devres_add(device->dev, p);
|
|
} else {
|
|
devres_free(p);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(dmaenginem_async_device_register);
|
|
|
|
struct dmaengine_unmap_pool {
|
|
struct kmem_cache *cache;
|
|
const char *name;
|
|
mempool_t *pool;
|
|
size_t size;
|
|
};
|
|
|
|
#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
|
|
static struct dmaengine_unmap_pool unmap_pool[] = {
|
|
__UNMAP_POOL(2),
|
|
#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
|
|
__UNMAP_POOL(16),
|
|
__UNMAP_POOL(128),
|
|
__UNMAP_POOL(256),
|
|
#endif
|
|
};
|
|
|
|
static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
|
|
{
|
|
int order = get_count_order(nr);
|
|
|
|
switch (order) {
|
|
case 0 ... 1:
|
|
return &unmap_pool[0];
|
|
#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
|
|
case 2 ... 4:
|
|
return &unmap_pool[1];
|
|
case 5 ... 7:
|
|
return &unmap_pool[2];
|
|
case 8:
|
|
return &unmap_pool[3];
|
|
#endif
|
|
default:
|
|
BUG();
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
static void dmaengine_unmap(struct kref *kref)
|
|
{
|
|
struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
|
|
struct device *dev = unmap->dev;
|
|
int cnt, i;
|
|
|
|
cnt = unmap->to_cnt;
|
|
for (i = 0; i < cnt; i++)
|
|
dma_unmap_page(dev, unmap->addr[i], unmap->len,
|
|
DMA_TO_DEVICE);
|
|
cnt += unmap->from_cnt;
|
|
for (; i < cnt; i++)
|
|
dma_unmap_page(dev, unmap->addr[i], unmap->len,
|
|
DMA_FROM_DEVICE);
|
|
cnt += unmap->bidi_cnt;
|
|
for (; i < cnt; i++) {
|
|
if (unmap->addr[i] == 0)
|
|
continue;
|
|
dma_unmap_page(dev, unmap->addr[i], unmap->len,
|
|
DMA_BIDIRECTIONAL);
|
|
}
|
|
cnt = unmap->map_cnt;
|
|
mempool_free(unmap, __get_unmap_pool(cnt)->pool);
|
|
}
|
|
|
|
void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
|
|
{
|
|
if (unmap)
|
|
kref_put(&unmap->kref, dmaengine_unmap);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
|
|
|
|
static void dmaengine_destroy_unmap_pool(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
|
|
struct dmaengine_unmap_pool *p = &unmap_pool[i];
|
|
|
|
mempool_destroy(p->pool);
|
|
p->pool = NULL;
|
|
kmem_cache_destroy(p->cache);
|
|
p->cache = NULL;
|
|
}
|
|
}
|
|
|
|
static int __init dmaengine_init_unmap_pool(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
|
|
struct dmaengine_unmap_pool *p = &unmap_pool[i];
|
|
size_t size;
|
|
|
|
size = sizeof(struct dmaengine_unmap_data) +
|
|
sizeof(dma_addr_t) * p->size;
|
|
|
|
p->cache = kmem_cache_create(p->name, size, 0,
|
|
SLAB_HWCACHE_ALIGN, NULL);
|
|
if (!p->cache)
|
|
break;
|
|
p->pool = mempool_create_slab_pool(1, p->cache);
|
|
if (!p->pool)
|
|
break;
|
|
}
|
|
|
|
if (i == ARRAY_SIZE(unmap_pool))
|
|
return 0;
|
|
|
|
dmaengine_destroy_unmap_pool();
|
|
return -ENOMEM;
|
|
}
|
|
|
|
struct dmaengine_unmap_data *
|
|
dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
|
|
{
|
|
struct dmaengine_unmap_data *unmap;
|
|
|
|
unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
|
|
if (!unmap)
|
|
return NULL;
|
|
|
|
memset(unmap, 0, sizeof(*unmap));
|
|
kref_init(&unmap->kref);
|
|
unmap->dev = dev;
|
|
unmap->map_cnt = nr;
|
|
|
|
return unmap;
|
|
}
|
|
EXPORT_SYMBOL(dmaengine_get_unmap_data);
|
|
|
|
void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
|
|
struct dma_chan *chan)
|
|
{
|
|
tx->chan = chan;
|
|
#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
spin_lock_init(&tx->lock);
|
|
#endif
|
|
}
|
|
EXPORT_SYMBOL(dma_async_tx_descriptor_init);
|
|
|
|
/* dma_wait_for_async_tx - spin wait for a transaction to complete
|
|
* @tx: in-flight transaction to wait on
|
|
*/
|
|
enum dma_status
|
|
dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
|
|
{
|
|
unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
|
|
|
|
if (!tx)
|
|
return DMA_COMPLETE;
|
|
|
|
while (tx->cookie == -EBUSY) {
|
|
if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
|
|
dev_err(tx->chan->device->dev,
|
|
"%s timeout waiting for descriptor submission\n",
|
|
__func__);
|
|
return DMA_ERROR;
|
|
}
|
|
cpu_relax();
|
|
}
|
|
return dma_sync_wait(tx->chan, tx->cookie);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
|
|
|
|
/* dma_run_dependencies - helper routine for dma drivers to process
|
|
* (start) dependent operations on their target channel
|
|
* @tx: transaction with dependencies
|
|
*/
|
|
void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
|
|
{
|
|
struct dma_async_tx_descriptor *dep = txd_next(tx);
|
|
struct dma_async_tx_descriptor *dep_next;
|
|
struct dma_chan *chan;
|
|
|
|
if (!dep)
|
|
return;
|
|
|
|
/* we'll submit tx->next now, so clear the link */
|
|
txd_clear_next(tx);
|
|
chan = dep->chan;
|
|
|
|
/* keep submitting up until a channel switch is detected
|
|
* in that case we will be called again as a result of
|
|
* processing the interrupt from async_tx_channel_switch
|
|
*/
|
|
for (; dep; dep = dep_next) {
|
|
txd_lock(dep);
|
|
txd_clear_parent(dep);
|
|
dep_next = txd_next(dep);
|
|
if (dep_next && dep_next->chan == chan)
|
|
txd_clear_next(dep); /* ->next will be submitted */
|
|
else
|
|
dep_next = NULL; /* submit current dep and terminate */
|
|
txd_unlock(dep);
|
|
|
|
dep->tx_submit(dep);
|
|
}
|
|
|
|
chan->device->device_issue_pending(chan);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_run_dependencies);
|
|
|
|
static int __init dma_bus_init(void)
|
|
{
|
|
int err = dmaengine_init_unmap_pool();
|
|
|
|
if (err)
|
|
return err;
|
|
return class_register(&dma_devclass);
|
|
}
|
|
arch_initcall(dma_bus_init);
|
|
|
|
|