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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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109 lines
2.2 KiB
C
109 lines
2.2 KiB
C
/*
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* Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
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* derived from r4xx0.c by David S. Miller (dm@engr.sgi.com).
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <asm/mipsregs.h>
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#include <asm/bcache.h>
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#include <asm/cacheops.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/mmu_context.h>
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#include <asm/r4kcache.h>
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/* Secondary cache size in bytes, if present. */
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static unsigned long scache_size;
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#define SC_LINE 32
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#define SC_PAGE (128*SC_LINE)
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static inline void blast_r5000_scache(void)
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{
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unsigned long start = INDEX_BASE;
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unsigned long end = start + scache_size;
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while(start < end) {
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cache_op(R5K_Page_Invalidate_S, start);
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start += SC_PAGE;
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}
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}
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static void r5k_dma_cache_inv_sc(unsigned long addr, unsigned long size)
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{
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unsigned long end, a;
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/* Catch bad driver code */
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BUG_ON(size == 0);
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if (size >= scache_size) {
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blast_r5000_scache();
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return;
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}
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/* On the R5000 secondary cache we cannot
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* invalidate less than a page at a time.
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* The secondary cache is physically indexed, write-through.
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*/
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a = addr & ~(SC_PAGE - 1);
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end = (addr + size - 1) & ~(SC_PAGE - 1);
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while (a <= end) {
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cache_op(R5K_Page_Invalidate_S, a);
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a += SC_PAGE;
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}
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}
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static void r5k_sc_enable(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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set_c0_config(R5K_CONF_SE);
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blast_r5000_scache();
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local_irq_restore(flags);
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}
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static void r5k_sc_disable(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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blast_r5000_scache();
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clear_c0_config(R5K_CONF_SE);
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local_irq_restore(flags);
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}
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static inline int __init r5k_sc_probe(void)
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{
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unsigned long config = read_c0_config();
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if (config & CONF_SC)
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return(0);
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scache_size = (512 * 1024) << ((config & R5K_CONF_SS) >> 20);
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printk("R5000 SCACHE size %ldkB, linesize 32 bytes.\n",
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scache_size >> 10);
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return 1;
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}
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static struct bcache_ops r5k_sc_ops = {
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.bc_enable = r5k_sc_enable,
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.bc_disable = r5k_sc_disable,
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.bc_wback_inv = r5k_dma_cache_inv_sc,
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.bc_inv = r5k_dma_cache_inv_sc
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};
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void __cpuinit r5k_sc_init(void)
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{
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if (r5k_sc_probe()) {
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r5k_sc_enable();
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bcops = &r5k_sc_ops;
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}
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}
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