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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8474b02531
This is largely a rewrite of the Host1x channel allocation code, bringing several changes: - The previous code could deadlock due to an interaction between the 'reflock' mutex and CDMA timeout handling. This gets rid of the mutex. - Support for more than 32 channels, required for Tegra186 - General refactoring, including better encapsulation of channel ownership handling into channel.c Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| cdma_hw.c | ||
| channel_hw.c | ||
| debug_hw.c | ||
| host1x01_hardware.h | ||
| host1x01.c | ||
| host1x01.h | ||
| host1x02_hardware.h | ||
| host1x02.c | ||
| host1x02.h | ||
| host1x04_hardware.h | ||
| host1x04.c | ||
| host1x04.h | ||
| host1x05_hardware.h | ||
| host1x05.c | ||
| host1x05.h | ||
| hw_host1x01_channel.h | ||
| hw_host1x01_sync.h | ||
| hw_host1x01_uclass.h | ||
| hw_host1x02_channel.h | ||
| hw_host1x02_sync.h | ||
| hw_host1x02_uclass.h | ||
| hw_host1x04_channel.h | ||
| hw_host1x04_sync.h | ||
| hw_host1x04_uclass.h | ||
| hw_host1x05_channel.h | ||
| hw_host1x05_sync.h | ||
| hw_host1x05_uclass.h | ||
| intr_hw.c | ||
| syncpt_hw.c | ||