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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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247c445c0f
OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5. - Additional 32 interrupt support is added w.r.t OMAP4 design. - The AUX CORE boot registers are now made accessible from non-secure SW. - SAR offset are changed and PTMSYNC* registers are removed from SAR. Patch updates the WakeupGen code accordingly. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
87 lines
1.8 KiB
C
87 lines
1.8 KiB
C
/*
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* OMAP4 SMP cpu-hotplug support
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Author:
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* Platform file needed for the OMAP4 SMP. This file is based on arm
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* realview smp platform.
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* Copyright (c) 2002 ARM Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <mach/omap-wakeupgen.h>
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#include "common.h"
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#include "powerdomain.h"
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int platform_cpu_kill(unsigned int cpu)
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{
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return 1;
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}
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/*
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* platform-specific code to shutdown a CPU
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* Called with IRQs disabled
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*/
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void __ref platform_cpu_die(unsigned int cpu)
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{
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unsigned int boot_cpu = 0;
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void __iomem *base = omap_get_wakeupgen_base();
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flush_cache_all();
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dsb();
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/*
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* we're ready for shutdown now, so do it
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*/
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if (omap_secure_apis_support()) {
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if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0)
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pr_err("Secure clear status failed\n");
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} else {
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__raw_writel(0, base + OMAP_AUX_CORE_BOOT_0);
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}
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for (;;) {
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/*
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* Enter into low power state
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*/
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omap4_hotplug_cpu(cpu, PWRDM_POWER_OFF);
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if (omap_secure_apis_support())
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boot_cpu = omap_read_auxcoreboot0();
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else
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boot_cpu =
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__raw_readl(base + OMAP_AUX_CORE_BOOT_0) >> 5;
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if (boot_cpu == smp_processor_id()) {
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/*
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* OK, proper wakeup, we're done
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*/
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break;
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}
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pr_debug("CPU%u: spurious wakeup call\n", cpu);
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}
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}
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int platform_cpu_disable(unsigned int cpu)
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{
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/*
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* we don't allow CPU 0 to be shutdown (it is still too special
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* e.g. clock tick interrupts)
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*/
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return cpu == 0 ? -EPERM : 0;
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}
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