mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
4190436096
Initial revision of device tree for AMD Seattle Development platform. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Thomas Lendacky <Thomas.Lendacky@amd.com> Signed-off-by: Joel Schopp <Joel.Schopp@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
55 lines
1.2 KiB
Plaintext
55 lines
1.2 KiB
Plaintext
/*
|
|
* DTS file for AMD Seattle Clocks
|
|
*
|
|
* Copyright (C) 2014 Advanced Micro Devices, Inc.
|
|
*/
|
|
|
|
adl3clk_100mhz: clk100mhz_0 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <100000000>;
|
|
clock-output-names = "adl3clk_100mhz";
|
|
};
|
|
|
|
ccpclk_375mhz: clk375mhz {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <375000000>;
|
|
clock-output-names = "ccpclk_375mhz";
|
|
};
|
|
|
|
sataclk_333mhz: clk333mhz {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <333000000>;
|
|
clock-output-names = "sataclk_333mhz";
|
|
};
|
|
|
|
pcieclk_500mhz: clk500mhz_0 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <500000000>;
|
|
clock-output-names = "pcieclk_500mhz";
|
|
};
|
|
|
|
dmaclk_500mhz: clk500mhz_1 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <500000000>;
|
|
clock-output-names = "dmaclk_500mhz";
|
|
};
|
|
|
|
miscclk_250mhz: clk250mhz_4 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <250000000>;
|
|
clock-output-names = "miscclk_250mhz";
|
|
};
|
|
|
|
uartspiclk_100mhz: clk100mhz_1 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <100000000>;
|
|
clock-output-names = "uartspiclk_100mhz";
|
|
};
|