mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 04:45:36 +07:00
a86854d0c5
The devm_kzalloc() function has a 2-factor argument form, devm_kcalloc(). This patch replaces cases of: devm_kzalloc(handle, a * b, gfp) with: devm_kcalloc(handle, a * b, gfp) as well as handling cases of: devm_kzalloc(handle, a * b * c, gfp) with: devm_kzalloc(handle, array3_size(a, b, c), gfp) as it's slightly less ugly than: devm_kcalloc(handle, array_size(a, b), c, gfp) This does, however, attempt to ignore constant size factors like: devm_kzalloc(handle, 4 * 1024, gfp) though any constants defined via macros get caught up in the conversion. Any factors with a sizeof() of "unsigned char", "char", and "u8" were dropped, since they're redundant. Some manual whitespace fixes were needed in this patch, as Coccinelle really liked to write "=devm_kcalloc..." instead of "= devm_kcalloc...". The Coccinelle script used for this was: // Fix redundant parens around sizeof(). @@ expression HANDLE; type TYPE; expression THING, E; @@ ( devm_kzalloc(HANDLE, - (sizeof(TYPE)) * E + sizeof(TYPE) * E , ...) | devm_kzalloc(HANDLE, - (sizeof(THING)) * E + sizeof(THING) * E , ...) ) // Drop single-byte sizes and redundant parens. @@ expression HANDLE; expression COUNT; typedef u8; typedef __u8; @@ ( devm_kzalloc(HANDLE, - sizeof(u8) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(__u8) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(char) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(unsigned char) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(u8) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(__u8) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(char) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(unsigned char) * COUNT + COUNT , ...) ) // 2-factor product with sizeof(type/expression) and identifier or constant. @@ expression HANDLE; type TYPE; expression THING; identifier COUNT_ID; constant COUNT_CONST; @@ ( - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (COUNT_ID) + COUNT_ID, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * COUNT_ID + COUNT_ID, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (COUNT_CONST) + COUNT_CONST, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * COUNT_CONST + COUNT_CONST, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (COUNT_ID) + COUNT_ID, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * COUNT_ID + COUNT_ID, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (COUNT_CONST) + COUNT_CONST, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * COUNT_CONST + COUNT_CONST, sizeof(THING) , ...) ) // 2-factor product, only identifiers. @@ expression HANDLE; identifier SIZE, COUNT; @@ - devm_kzalloc + devm_kcalloc (HANDLE, - SIZE * COUNT + COUNT, SIZE , ...) // 3-factor product with 1 sizeof(type) or sizeof(expression), with // redundant parens removed. @@ expression HANDLE; expression THING; identifier STRIDE, COUNT; type TYPE; @@ ( devm_kzalloc(HANDLE, - sizeof(TYPE) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) ) // 3-factor product with 2 sizeof(variable), with redundant parens removed. @@ expression HANDLE; expression THING1, THING2; identifier COUNT; type TYPE1, TYPE2; @@ ( devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(TYPE2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) ) // 3-factor product, only identifiers, with redundant parens removed. @@ expression HANDLE; identifier STRIDE, SIZE, COUNT; @@ ( devm_kzalloc(HANDLE, - (COUNT) * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) ) // Any remaining multi-factor products, first at least 3-factor products, // when they're not all constants... @@ expression HANDLE; expression E1, E2, E3; constant C1, C2, C3; @@ ( devm_kzalloc(HANDLE, C1 * C2 * C3, ...) | devm_kzalloc(HANDLE, - (E1) * E2 * E3 + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - (E1) * (E2) * E3 + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - (E1) * (E2) * (E3) + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - E1 * E2 * E3 + array3_size(E1, E2, E3) , ...) ) // And then all remaining 2 factors products when they're not all constants, // keeping sizeof() as the second factor argument. @@ expression HANDLE; expression THING, E1, E2; type TYPE; constant C1, C2, C3; @@ ( devm_kzalloc(HANDLE, sizeof(THING) * C2, ...) | devm_kzalloc(HANDLE, sizeof(TYPE) * C2, ...) | devm_kzalloc(HANDLE, C1 * C2 * C3, ...) | devm_kzalloc(HANDLE, C1 * C2, ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (E2) + E2, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * E2 + E2, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (E2) + E2, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * E2 + E2, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - (E1) * E2 + E1, E2 , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - (E1) * (E2) + E1, E2 , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - E1 * E2 + E1, E2 , ...) ) Signed-off-by: Kees Cook <keescook@chromium.org>
650 lines
17 KiB
C
650 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// Core driver for the imx pin controller in imx1/21/27
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//
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// Copyright (C) 2013 Pengutronix
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// Author: Markus Pargmann <mpa@pengutronix.de>
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//
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// Based on pinctrl-imx.c:
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// Author: Dong Aisheng <dong.aisheng@linaro.org>
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// Copyright (C) 2012 Freescale Semiconductor, Inc.
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// Copyright (C) 2012 Linaro Ltd.
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/slab.h>
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#include "../core.h"
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#include "pinctrl-imx1.h"
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struct imx1_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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void __iomem *base;
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const struct imx1_pinctrl_soc_info *info;
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};
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/*
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* MX1 register offsets
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*/
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#define MX1_DDIR 0x00
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#define MX1_OCR 0x04
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#define MX1_ICONFA 0x0c
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#define MX1_ICONFB 0x14
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#define MX1_GIUS 0x20
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#define MX1_GPR 0x38
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#define MX1_PUEN 0x40
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#define MX1_PORT_STRIDE 0x100
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/*
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* MUX_ID format defines
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*/
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#define MX1_MUX_FUNCTION(val) (BIT(0) & val)
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#define MX1_MUX_GPIO(val) ((BIT(1) & val) >> 1)
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#define MX1_MUX_DIR(val) ((BIT(2) & val) >> 2)
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#define MX1_MUX_OCONF(val) (((BIT(4) | BIT(5)) & val) >> 4)
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#define MX1_MUX_ICONFA(val) (((BIT(8) | BIT(9)) & val) >> 8)
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#define MX1_MUX_ICONFB(val) (((BIT(10) | BIT(11)) & val) >> 10)
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/*
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* IMX1 IOMUXC manages the pins based on ports. Each port has 32 pins. IOMUX
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* control register are seperated into function, output configuration, input
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* configuration A, input configuration B, GPIO in use and data direction.
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*
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* Those controls that are represented by 1 bit have a direct mapping between
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* bit position and pin id. If they are represented by 2 bit, the lower 16 pins
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* are in the first register and the upper 16 pins in the second (next)
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* register. pin_id is stored in bit (pin_id%16)*2 and the bit above.
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*/
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/*
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* Calculates the register offset from a pin_id
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*/
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static void __iomem *imx1_mem(struct imx1_pinctrl *ipctl, unsigned int pin_id)
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{
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unsigned int port = pin_id / 32;
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return ipctl->base + port * MX1_PORT_STRIDE;
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}
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/*
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* Write to a register with 2 bits per pin. The function will automatically
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* use the next register if the pin is managed in the second register.
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*/
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static void imx1_write_2bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
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u32 value, u32 reg_offset)
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{
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void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset;
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int offset = (pin_id % 16) * 2; /* offset, regardless of register used */
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int mask = ~(0x3 << offset); /* Mask for 2 bits at offset */
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u32 old_val;
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u32 new_val;
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/* Use the next register if the pin's port pin number is >=16 */
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if (pin_id % 32 >= 16)
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reg += 0x04;
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dev_dbg(ipctl->dev, "write: register 0x%p offset %d value 0x%x\n",
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reg, offset, value);
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/* Get current state of pins */
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old_val = readl(reg);
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old_val &= mask;
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new_val = value & 0x3; /* Make sure value is really 2 bit */
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new_val <<= offset;
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new_val |= old_val;/* Set new state for pin_id */
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writel(new_val, reg);
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}
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static void imx1_write_bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
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u32 value, u32 reg_offset)
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{
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void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset;
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int offset = pin_id % 32;
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int mask = ~BIT_MASK(offset);
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u32 old_val;
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u32 new_val;
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/* Get current state of pins */
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old_val = readl(reg);
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old_val &= mask;
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new_val = value & 0x1; /* Make sure value is really 1 bit */
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new_val <<= offset;
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new_val |= old_val;/* Set new state for pin_id */
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writel(new_val, reg);
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}
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static int imx1_read_2bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
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u32 reg_offset)
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{
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void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset;
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int offset = (pin_id % 16) * 2;
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/* Use the next register if the pin's port pin number is >=16 */
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if (pin_id % 32 >= 16)
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reg += 0x04;
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return (readl(reg) & (BIT(offset) | BIT(offset+1))) >> offset;
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}
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static int imx1_read_bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
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u32 reg_offset)
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{
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void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset;
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int offset = pin_id % 32;
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return !!(readl(reg) & BIT(offset));
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}
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static inline const struct imx1_pin_group *imx1_pinctrl_find_group_by_name(
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const struct imx1_pinctrl_soc_info *info,
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const char *name)
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{
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const struct imx1_pin_group *grp = NULL;
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int i;
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for (i = 0; i < info->ngroups; i++) {
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if (!strcmp(info->groups[i].name, name)) {
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grp = &info->groups[i];
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break;
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}
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}
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return grp;
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}
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static int imx1_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx1_pinctrl_soc_info *info = ipctl->info;
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return info->ngroups;
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}
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static const char *imx1_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx1_pinctrl_soc_info *info = ipctl->info;
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return info->groups[selector].name;
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}
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static int imx1_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
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const unsigned int **pins,
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unsigned *npins)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx1_pinctrl_soc_info *info = ipctl->info;
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if (selector >= info->ngroups)
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return -EINVAL;
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*pins = info->groups[selector].pin_ids;
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*npins = info->groups[selector].npins;
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return 0;
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}
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static void imx1_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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seq_printf(s, "GPIO %d, function %d, direction %d, oconf %d, iconfa %d, iconfb %d",
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imx1_read_bit(ipctl, offset, MX1_GIUS),
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imx1_read_bit(ipctl, offset, MX1_GPR),
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imx1_read_bit(ipctl, offset, MX1_DDIR),
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imx1_read_2bit(ipctl, offset, MX1_OCR),
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imx1_read_2bit(ipctl, offset, MX1_ICONFA),
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imx1_read_2bit(ipctl, offset, MX1_ICONFB));
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}
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static int imx1_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx1_pinctrl_soc_info *info = ipctl->info;
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const struct imx1_pin_group *grp;
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struct pinctrl_map *new_map;
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struct device_node *parent;
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int map_num = 1;
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int i, j;
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/*
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* first find the group of this node and check if we need create
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* config maps for pins
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*/
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grp = imx1_pinctrl_find_group_by_name(info, np->name);
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if (!grp) {
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dev_err(info->dev, "unable to find group for node %s\n",
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np->name);
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return -EINVAL;
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}
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for (i = 0; i < grp->npins; i++)
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map_num++;
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new_map = kmalloc_array(map_num, sizeof(struct pinctrl_map),
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GFP_KERNEL);
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if (!new_map)
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return -ENOMEM;
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*map = new_map;
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*num_maps = map_num;
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/* create mux map */
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parent = of_get_parent(np);
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if (!parent) {
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kfree(new_map);
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return -EINVAL;
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}
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new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
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new_map[0].data.mux.function = parent->name;
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new_map[0].data.mux.group = np->name;
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of_node_put(parent);
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/* create config map */
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new_map++;
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for (i = j = 0; i < grp->npins; i++) {
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new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
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new_map[j].data.configs.group_or_pin =
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pin_get_name(pctldev, grp->pins[i].pin_id);
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new_map[j].data.configs.configs = &grp->pins[i].config;
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new_map[j].data.configs.num_configs = 1;
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j++;
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}
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dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
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(*map)->data.mux.function, (*map)->data.mux.group, map_num);
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return 0;
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}
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static void imx1_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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kfree(map);
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}
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static const struct pinctrl_ops imx1_pctrl_ops = {
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.get_groups_count = imx1_get_groups_count,
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.get_group_name = imx1_get_group_name,
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.get_group_pins = imx1_get_group_pins,
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.pin_dbg_show = imx1_pin_dbg_show,
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.dt_node_to_map = imx1_dt_node_to_map,
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.dt_free_map = imx1_dt_free_map,
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};
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static int imx1_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx1_pinctrl_soc_info *info = ipctl->info;
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const struct imx1_pin *pins;
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unsigned int npins;
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int i;
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/*
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* Configure the mux mode for each pin in the group for a specific
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* function.
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*/
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pins = info->groups[group].pins;
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npins = info->groups[group].npins;
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WARN_ON(!pins || !npins);
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dev_dbg(ipctl->dev, "enable function %s group %s\n",
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info->functions[selector].name, info->groups[group].name);
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for (i = 0; i < npins; i++) {
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unsigned int mux = pins[i].mux_id;
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unsigned int pin_id = pins[i].pin_id;
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unsigned int afunction = MX1_MUX_FUNCTION(mux);
|
|
unsigned int gpio_in_use = MX1_MUX_GPIO(mux);
|
|
unsigned int direction = MX1_MUX_DIR(mux);
|
|
unsigned int gpio_oconf = MX1_MUX_OCONF(mux);
|
|
unsigned int gpio_iconfa = MX1_MUX_ICONFA(mux);
|
|
unsigned int gpio_iconfb = MX1_MUX_ICONFB(mux);
|
|
|
|
dev_dbg(pctldev->dev, "%s, pin 0x%x, function %d, gpio %d, direction %d, oconf %d, iconfa %d, iconfb %d\n",
|
|
__func__, pin_id, afunction, gpio_in_use,
|
|
direction, gpio_oconf, gpio_iconfa,
|
|
gpio_iconfb);
|
|
|
|
imx1_write_bit(ipctl, pin_id, gpio_in_use, MX1_GIUS);
|
|
imx1_write_bit(ipctl, pin_id, direction, MX1_DDIR);
|
|
|
|
if (gpio_in_use) {
|
|
imx1_write_2bit(ipctl, pin_id, gpio_oconf, MX1_OCR);
|
|
imx1_write_2bit(ipctl, pin_id, gpio_iconfa,
|
|
MX1_ICONFA);
|
|
imx1_write_2bit(ipctl, pin_id, gpio_iconfb,
|
|
MX1_ICONFB);
|
|
} else {
|
|
imx1_write_bit(ipctl, pin_id, afunction, MX1_GPR);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx1_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
const struct imx1_pinctrl_soc_info *info = ipctl->info;
|
|
|
|
return info->nfunctions;
|
|
}
|
|
|
|
static const char *imx1_pmx_get_func_name(struct pinctrl_dev *pctldev,
|
|
unsigned selector)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
const struct imx1_pinctrl_soc_info *info = ipctl->info;
|
|
|
|
return info->functions[selector].name;
|
|
}
|
|
|
|
static int imx1_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
|
|
const char * const **groups,
|
|
unsigned * const num_groups)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
const struct imx1_pinctrl_soc_info *info = ipctl->info;
|
|
|
|
*groups = info->functions[selector].groups;
|
|
*num_groups = info->functions[selector].num_groups;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct pinmux_ops imx1_pmx_ops = {
|
|
.get_functions_count = imx1_pmx_get_funcs_count,
|
|
.get_function_name = imx1_pmx_get_func_name,
|
|
.get_function_groups = imx1_pmx_get_groups,
|
|
.set_mux = imx1_pmx_set,
|
|
};
|
|
|
|
static int imx1_pinconf_get(struct pinctrl_dev *pctldev,
|
|
unsigned pin_id, unsigned long *config)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
*config = imx1_read_bit(ipctl, pin_id, MX1_PUEN);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx1_pinconf_set(struct pinctrl_dev *pctldev,
|
|
unsigned pin_id, unsigned long *configs,
|
|
unsigned num_configs)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
int i;
|
|
|
|
for (i = 0; i != num_configs; ++i) {
|
|
imx1_write_bit(ipctl, pin_id, configs[i] & 0x01, MX1_PUEN);
|
|
|
|
dev_dbg(ipctl->dev, "pinconf set pullup pin %s\n",
|
|
pin_desc_get(pctldev, pin_id)->name);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void imx1_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
|
struct seq_file *s, unsigned pin_id)
|
|
{
|
|
unsigned long config;
|
|
|
|
imx1_pinconf_get(pctldev, pin_id, &config);
|
|
seq_printf(s, "0x%lx", config);
|
|
}
|
|
|
|
static void imx1_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
|
|
struct seq_file *s, unsigned group)
|
|
{
|
|
struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
const struct imx1_pinctrl_soc_info *info = ipctl->info;
|
|
struct imx1_pin_group *grp;
|
|
unsigned long config;
|
|
const char *name;
|
|
int i, ret;
|
|
|
|
if (group > info->ngroups)
|
|
return;
|
|
|
|
seq_puts(s, "\n");
|
|
grp = &info->groups[group];
|
|
for (i = 0; i < grp->npins; i++) {
|
|
name = pin_get_name(pctldev, grp->pins[i].pin_id);
|
|
ret = imx1_pinconf_get(pctldev, grp->pins[i].pin_id, &config);
|
|
if (ret)
|
|
return;
|
|
seq_printf(s, "%s: 0x%lx", name, config);
|
|
}
|
|
}
|
|
|
|
static const struct pinconf_ops imx1_pinconf_ops = {
|
|
.pin_config_get = imx1_pinconf_get,
|
|
.pin_config_set = imx1_pinconf_set,
|
|
.pin_config_dbg_show = imx1_pinconf_dbg_show,
|
|
.pin_config_group_dbg_show = imx1_pinconf_group_dbg_show,
|
|
};
|
|
|
|
static struct pinctrl_desc imx1_pinctrl_desc = {
|
|
.pctlops = &imx1_pctrl_ops,
|
|
.pmxops = &imx1_pmx_ops,
|
|
.confops = &imx1_pinconf_ops,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static int imx1_pinctrl_parse_groups(struct device_node *np,
|
|
struct imx1_pin_group *grp,
|
|
struct imx1_pinctrl_soc_info *info,
|
|
u32 index)
|
|
{
|
|
int size;
|
|
const __be32 *list;
|
|
int i;
|
|
|
|
dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
|
|
|
|
/* Initialise group */
|
|
grp->name = np->name;
|
|
|
|
/*
|
|
* the binding format is fsl,pins = <PIN MUX_ID CONFIG>
|
|
*/
|
|
list = of_get_property(np, "fsl,pins", &size);
|
|
/* we do not check return since it's safe node passed down */
|
|
if (!size || size % 12) {
|
|
dev_notice(info->dev, "Not a valid fsl,pins property (%s)\n",
|
|
np->name);
|
|
return -EINVAL;
|
|
}
|
|
|
|
grp->npins = size / 12;
|
|
grp->pins = devm_kcalloc(info->dev,
|
|
grp->npins, sizeof(struct imx1_pin), GFP_KERNEL);
|
|
grp->pin_ids = devm_kcalloc(info->dev,
|
|
grp->npins, sizeof(unsigned int), GFP_KERNEL);
|
|
|
|
if (!grp->pins || !grp->pin_ids)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < grp->npins; i++) {
|
|
grp->pins[i].pin_id = be32_to_cpu(*list++);
|
|
grp->pins[i].mux_id = be32_to_cpu(*list++);
|
|
grp->pins[i].config = be32_to_cpu(*list++);
|
|
|
|
grp->pin_ids[i] = grp->pins[i].pin_id;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx1_pinctrl_parse_functions(struct device_node *np,
|
|
struct imx1_pinctrl_soc_info *info,
|
|
u32 index)
|
|
{
|
|
struct device_node *child;
|
|
struct imx1_pmx_func *func;
|
|
struct imx1_pin_group *grp;
|
|
int ret;
|
|
static u32 grp_index;
|
|
u32 i = 0;
|
|
|
|
dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
|
|
|
|
func = &info->functions[index];
|
|
|
|
/* Initialise function */
|
|
func->name = np->name;
|
|
func->num_groups = of_get_child_count(np);
|
|
if (func->num_groups == 0)
|
|
return -EINVAL;
|
|
|
|
func->groups = devm_kcalloc(info->dev,
|
|
func->num_groups, sizeof(char *), GFP_KERNEL);
|
|
|
|
if (!func->groups)
|
|
return -ENOMEM;
|
|
|
|
for_each_child_of_node(np, child) {
|
|
func->groups[i] = child->name;
|
|
grp = &info->groups[grp_index++];
|
|
ret = imx1_pinctrl_parse_groups(child, grp, info, i++);
|
|
if (ret == -ENOMEM) {
|
|
of_node_put(child);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx1_pinctrl_parse_dt(struct platform_device *pdev,
|
|
struct imx1_pinctrl *pctl, struct imx1_pinctrl_soc_info *info)
|
|
{
|
|
struct device_node *np = pdev->dev.of_node;
|
|
struct device_node *child;
|
|
int ret;
|
|
u32 nfuncs = 0;
|
|
u32 ngroups = 0;
|
|
u32 ifunc = 0;
|
|
|
|
if (!np)
|
|
return -ENODEV;
|
|
|
|
for_each_child_of_node(np, child) {
|
|
++nfuncs;
|
|
ngroups += of_get_child_count(child);
|
|
}
|
|
|
|
if (!nfuncs) {
|
|
dev_err(&pdev->dev, "No pin functions defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
info->nfunctions = nfuncs;
|
|
info->functions = devm_kcalloc(&pdev->dev,
|
|
nfuncs, sizeof(struct imx1_pmx_func), GFP_KERNEL);
|
|
|
|
info->ngroups = ngroups;
|
|
info->groups = devm_kcalloc(&pdev->dev,
|
|
ngroups, sizeof(struct imx1_pin_group), GFP_KERNEL);
|
|
|
|
|
|
if (!info->functions || !info->groups)
|
|
return -ENOMEM;
|
|
|
|
for_each_child_of_node(np, child) {
|
|
ret = imx1_pinctrl_parse_functions(child, info, ifunc++);
|
|
if (ret == -ENOMEM) {
|
|
of_node_put(child);
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int imx1_pinctrl_core_probe(struct platform_device *pdev,
|
|
struct imx1_pinctrl_soc_info *info)
|
|
{
|
|
struct imx1_pinctrl *ipctl;
|
|
struct resource *res;
|
|
struct pinctrl_desc *pctl_desc;
|
|
int ret;
|
|
|
|
if (!info || !info->pins || !info->npins) {
|
|
dev_err(&pdev->dev, "wrong pinctrl info\n");
|
|
return -EINVAL;
|
|
}
|
|
info->dev = &pdev->dev;
|
|
|
|
/* Create state holders etc for this driver */
|
|
ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
|
|
if (!ipctl)
|
|
return -ENOMEM;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -ENOENT;
|
|
|
|
ipctl->base = devm_ioremap_nocache(&pdev->dev, res->start,
|
|
resource_size(res));
|
|
if (!ipctl->base)
|
|
return -ENOMEM;
|
|
|
|
pctl_desc = &imx1_pinctrl_desc;
|
|
pctl_desc->name = dev_name(&pdev->dev);
|
|
pctl_desc->pins = info->pins;
|
|
pctl_desc->npins = info->npins;
|
|
|
|
ret = imx1_pinctrl_parse_dt(pdev, ipctl, info);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "fail to probe dt properties\n");
|
|
return ret;
|
|
}
|
|
|
|
ipctl->info = info;
|
|
ipctl->dev = info->dev;
|
|
platform_set_drvdata(pdev, ipctl);
|
|
ipctl->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, ipctl);
|
|
if (IS_ERR(ipctl->pctl)) {
|
|
dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
|
|
return PTR_ERR(ipctl->pctl);
|
|
}
|
|
|
|
ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
|
|
if (ret) {
|
|
pinctrl_unregister(ipctl->pctl);
|
|
dev_err(&pdev->dev, "Failed to populate subdevices\n");
|
|
return ret;
|
|
}
|
|
|
|
dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
|
|
|
|
return 0;
|
|
}
|