mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 21:36:41 +07:00
a866374aec
Introduce pagefault_{disable,enable}() and use these where previously we did
manual preempt increments/decrements to make the pagefault handler do the
atomic thing.
Currently they still rely on the increased preempt count, but do not rely on
the disabled preemption, this might go away in the future.
(NOTE: the extra barrier() in pagefault_disable might fix some holes on
machines which have too many registers for their own good)
[heiko.carstens@de.ibm.com: s390 fix]
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Nick Piggin <npiggin@suse.de>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
243 lines
6.5 KiB
C
243 lines
6.5 KiB
C
/* futex.c: futex operations
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*
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* Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/futex.h>
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#include <asm/futex.h>
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#include <asm/errno.h>
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#include <asm/uaccess.h>
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/*
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* the various futex operations; MMU fault checking is ignored under no-MMU
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* conditions
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*/
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static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, int *_oldval)
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{
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int oldval, ret;
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asm("0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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"1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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"2: cst.p %3,%M0 ,cc3,#1 \n"
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
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" beq icc3,#0,0b \n"
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" setlos 0,%2 \n"
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"3: \n"
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".subsection 2 \n"
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"4: setlos %5,%2 \n"
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" bra 3b \n"
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".previous \n"
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".section __ex_table,\"a\" \n"
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" .balign 8 \n"
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" .long 1b,4b \n"
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" .long 2b,4b \n"
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".previous"
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: "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg)
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: "3"(oparg), "i"(-EFAULT)
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: "memory", "cc7", "cc3", "icc3"
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);
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*_oldval = oldval;
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return ret;
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}
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static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, int *_oldval)
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{
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int oldval, ret;
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asm("0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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"1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" add %1,%3,%3 \n"
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"2: cst.p %3,%M0 ,cc3,#1 \n"
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
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" beq icc3,#0,0b \n"
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" setlos 0,%2 \n"
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"3: \n"
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".subsection 2 \n"
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"4: setlos %5,%2 \n"
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" bra 3b \n"
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".previous \n"
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".section __ex_table,\"a\" \n"
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" .balign 8 \n"
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" .long 1b,4b \n"
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" .long 2b,4b \n"
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".previous"
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: "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg)
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: "3"(oparg), "i"(-EFAULT)
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: "memory", "cc7", "cc3", "icc3"
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);
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*_oldval = oldval;
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return ret;
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}
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static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, int *_oldval)
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{
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int oldval, ret;
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asm("0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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"1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" or %1,%3,%3 \n"
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"2: cst.p %3,%M0 ,cc3,#1 \n"
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
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" beq icc3,#0,0b \n"
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" setlos 0,%2 \n"
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"3: \n"
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".subsection 2 \n"
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"4: setlos %5,%2 \n"
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" bra 3b \n"
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".previous \n"
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".section __ex_table,\"a\" \n"
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" .balign 8 \n"
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" .long 1b,4b \n"
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" .long 2b,4b \n"
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".previous"
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: "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg)
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: "3"(oparg), "i"(-EFAULT)
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: "memory", "cc7", "cc3", "icc3"
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);
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*_oldval = oldval;
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return ret;
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}
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static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, int *_oldval)
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{
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int oldval, ret;
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asm("0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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"1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" and %1,%3,%3 \n"
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"2: cst.p %3,%M0 ,cc3,#1 \n"
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
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" beq icc3,#0,0b \n"
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" setlos 0,%2 \n"
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"3: \n"
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".subsection 2 \n"
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"4: setlos %5,%2 \n"
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" bra 3b \n"
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".previous \n"
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".section __ex_table,\"a\" \n"
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" .balign 8 \n"
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" .long 1b,4b \n"
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" .long 2b,4b \n"
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".previous"
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: "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg)
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: "3"(oparg), "i"(-EFAULT)
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: "memory", "cc7", "cc3", "icc3"
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);
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*_oldval = oldval;
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return ret;
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}
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static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, int *_oldval)
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{
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int oldval, ret;
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asm("0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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"1: ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" xor %1,%3,%3 \n"
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"2: cst.p %3,%M0 ,cc3,#1 \n"
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
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" beq icc3,#0,0b \n"
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" setlos 0,%2 \n"
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"3: \n"
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".subsection 2 \n"
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"4: setlos %5,%2 \n"
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" bra 3b \n"
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".previous \n"
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".section __ex_table,\"a\" \n"
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" .balign 8 \n"
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" .long 1b,4b \n"
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" .long 2b,4b \n"
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".previous"
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: "+U"(*uaddr), "=&r"(oldval), "=&r"(ret), "=r"(oparg)
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: "3"(oparg), "i"(-EFAULT)
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: "memory", "cc7", "cc3", "icc3"
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);
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*_oldval = oldval;
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return ret;
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}
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/*****************************************************************************/
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/*
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* do the futex operations
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*/
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int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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ret = atomic_futex_op_xchg_set(oparg, uaddr, &oldval);
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break;
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case FUTEX_OP_ADD:
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ret = atomic_futex_op_xchg_add(oparg, uaddr, &oldval);
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break;
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case FUTEX_OP_OR:
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ret = atomic_futex_op_xchg_or(oparg, uaddr, &oldval);
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break;
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case FUTEX_OP_ANDN:
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ret = atomic_futex_op_xchg_and(~oparg, uaddr, &oldval);
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break;
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case FUTEX_OP_XOR:
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ret = atomic_futex_op_xchg_xor(oparg, uaddr, &oldval);
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break;
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default:
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ret = -ENOSYS;
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break;
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}
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pagefault_enable();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS; break;
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}
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}
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return ret;
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} /* end futex_atomic_op_inuser() */
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