Peter Ujfalusi a74c52def9 clk: ti: clk-7xx: Correct ABE DPLL configuration ... ABE DPLL frequency need to be lowered from 361267200 to 180633600 to facilitate the ATL requironments. The dpll_abe_m2x2_ck clock need to be set to double of ABE DPLL rate in order to have correct clocks for audio. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2014-07-31 08:36:58 -07:00
..
at91	clk: at91: add slow clks driver	2014-05-07 18:27:45 +02:00
bcm	clk: bcm/kona: implement determine_rate()	2014-05-27 17:34:32 -07:00
berlin	clk: berlin: add core clock driver for BG2Q	2014-05-29 09:30:19 -07:00
hisilicon	clk: hisi: add clk-hix5hd2.c	2014-05-12 11:30:32 +08:00
keystone	clk: keystone: gate: fix clk_init_data initialization	2014-02-10 15:17:43 -05:00
mmp	clk: mmp: try to use closer one when do round rate	2014-03-26 20:59:27 -07:00
mvebu	clk: mvebu: add Orion5x clock driver	2014-04-26 01:03:55 +00:00
mxs
qcom	clk: qcom: HDMI source sel is 3 not 2	2014-07-02 16:33:18 -07:00
rockchip	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
samsung	This batch of fixes is for a handful of clock drivers from Allwinner,	2014-07-13 12:21:04 -07:00
shmobile	clk: shmobile: Add R8A7740-specific clock support	2014-05-23 13:38:25 -07:00
sirf	clk: sirf: update copyright years to 2014	2014-03-26 21:47:35 -07:00
socfpga	Adds support getting the divider registers for the MAIN PLL that was once	2014-05-12 19:11:13 -07:00
spear	clk: spear3xx: Set proper clock parent of uart1/2	2014-07-13 07:12:11 -07:00
st	clk: st: Terminate of match table	2014-05-28 12:08:53 -07:00
sunxi	clk: sunxi: fix devm_ioremap_resource error detection code	2014-07-01 23:37:34 -07:00
tegra	Merge branch 'clk-fixes' into clk-next	2014-05-28 00:15:10 -07:00
ti	clk: ti: clk-7xx: Correct ABE DPLL configuration	2014-07-31 08:36:58 -07:00
ux500	clk: ux500: Staticize ux500_twocell_get	2014-02-23 15:04:40 -08:00
versatile	The clock framework changes for 3.16 are pretty typical: mostly clock	2014-06-07 20:27:30 -07:00
x86
zynq	clk: zynq: Leave debug clocks in bootup state	2014-04-22 13:10:18 +02:00
clk-axi-clkgen.c	clk: axi-clkgen: Add support for v2	2014-02-26 17:02:29 -08:00
clk-axm5516.c	clk: Add clock driver for AXM55xx SoC	2014-05-22 22:06:14 -07:00
clk-bcm2835.c
clk-composite.c
clk-devres.c
clk-divider.c	clk: divider: Fix overflow in clk_divider_bestdiv	2014-05-27 19:16:24 -07:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-fractional-divider.c	clk: new basic clk type for fractional divider	2014-05-20 13:34:02 +02:00
clk-gate.c
clk-highbank.c
clk-ls1x.c
clk-max77686.c
clk-moxart.c	clk: add MOXA ART SoCs clock driver	2014-03-18 17:13:14 -07:00
clk-mux.c
clk-nomadik.c	clk: nomadik: fix multiplatform problem	2014-02-26 11:14:44 -08:00
clk-nspire.c
clk-ppc-corenet.c	clk: mpc85xx: Update the driver to align to new clock bindings	2014-03-19 17:04:14 -07:00
clk-s2mps11.c	clk: s2mps11: Fix double free corruption during driver unbind	2014-07-01 21:56:49 -07:00
clk-si570.c	clk: si570: Fix email address specifiction	2014-05-20 16:18:18 +02:00
clk-si5351.c	The second half of the clock framework pull requeust for 3.14 is	2014-01-28 18:44:53 -08:00
clk-si5351.h
clk-twl6040.c
clk-u300.c	clk: u300: Terminate of match table	2014-05-27 18:29:04 -07:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	clk: export __clk_round_rate for providers	2014-06-03 10:38:16 -07:00
clk.h	clk: Add of_clk_get_by_clkspec() helper	2014-05-22 15:54:59 -07:00
clkdev.c	clk: Add of_clk_get_by_clkspec() helper	2014-05-22 15:54:59 -07:00
Kconfig	The clock framework changes for 3.16 are pretty typical: mostly clock	2014-06-07 20:27:30 -07:00
Makefile	The clock framework changes for 3.16 are pretty typical: mostly clock	2014-06-07 20:27:30 -07:00