mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3405d230b3
This commit adds the architecture support required to enable the optimised implementation of lockrefs. That's as simple as defining arch_spin_value_unlocked() and selecting the Kconfig option. We also define cmpxchg64_relaxed(), because the lockref code does not need the cmpxchg to have barrier semantics. Using Linus' test case[1] on one system I see a 4x improvement for the basic enablement, and a further 1.3x for cmpxchg64_relaxed(), for a total of 5.3x vs the baseline. On another system I see more like 2x improvement. [1]: http://marc.info/?l=linux-fsdevel&m=137782380714721&w=4 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
311 lines
6.4 KiB
C
311 lines
6.4 KiB
C
#ifndef _ASM_POWERPC_CMPXCHG_H_
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#define _ASM_POWERPC_CMPXCHG_H_
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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/*
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* Atomic exchange
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*
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* Changes the memory location '*ptr' to be val and returns
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* the previous value stored there.
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*/
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static __always_inline unsigned long
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__xchg_u32(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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PPC_RELEASE_BARRIER
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"1: lwarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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PPC_ACQUIRE_BARRIER
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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/*
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* Atomic exchange
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*
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* Changes the memory location '*ptr' to be val and returns
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* the previous value stored there.
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*/
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static __always_inline unsigned long
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__xchg_u32_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__xchg_u64(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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PPC_RELEASE_BARRIER
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"1: ldarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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PPC_ACQUIRE_BARRIER
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__xchg_u64_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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#endif
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/*
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* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid xchg().
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*/
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extern void __xchg_called_with_bad_pointer(void);
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static __always_inline unsigned long
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__xchg(volatile void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 4:
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return __xchg_u32(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64(ptr, x);
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#endif
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}
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__xchg_called_with_bad_pointer();
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return x;
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}
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static __always_inline unsigned long
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__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 4:
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return __xchg_u32_local(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_local(ptr, x);
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#endif
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}
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__xchg_called_with_bad_pointer();
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return x;
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}
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#define xchg(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
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})
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#define xchg_local(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_local((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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/*
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* Compare and exchange - if *p == old, set it to new,
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* and return the old value of *p.
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*/
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#define __HAVE_ARCH_CMPXCHG 1
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static __always_inline unsigned long
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__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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PPC_RELEASE_BARRIER
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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PPC_ACQUIRE_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
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unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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PPC_RELEASE_BARRIER
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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PPC_ACQUIRE_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
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unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#endif
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/* This function doesn't exist, so you'll get a linker error
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if something tries to do an invalid cmpxchg(). */
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extern void __cmpxchg_called_with_bad_pointer(void);
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static __always_inline unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64(ptr, old, new);
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#endif
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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static __always_inline unsigned long
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__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32_local(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64_local(ptr, old, new);
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#endif
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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#define cmpxchg(ptr, o, n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#define cmpxchg_local(ptr, o, n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#ifdef CONFIG_PPC64
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#define cmpxchg64(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg((ptr), (o), (n)); \
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})
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#define cmpxchg64_local(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg_local((ptr), (o), (n)); \
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})
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#define cmpxchg64_relaxed cmpxchg64_local
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#else
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#include <asm-generic/cmpxchg-local.h>
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#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_CMPXCHG_H_ */
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