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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
385 lines
9.1 KiB
C
385 lines
9.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* HPE WatchDog Driver
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* based on
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*
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* SoftDog 0.05: A Software Watchdog Device
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*
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* (c) Copyright 2018 Hewlett Packard Enterprise Development LP
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* Thomas Mingarelli <thomas.mingarelli@hpe.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <asm/nmi.h>
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#define HPWDT_VERSION "2.0.2"
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#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
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#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
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#define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
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#define DEFAULT_MARGIN 30
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#define PRETIMEOUT_SEC 9
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static bool ilo5;
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static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING);
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static void __iomem *pci_mem_addr; /* the PCI-memory address */
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static unsigned long __iomem *hpwdt_nmistat;
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static unsigned long __iomem *hpwdt_timer_reg;
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static unsigned long __iomem *hpwdt_timer_con;
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static const struct pci_device_id hpwdt_devices[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
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{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
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{0}, /* terminate list */
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};
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MODULE_DEVICE_TABLE(pci, hpwdt_devices);
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static const struct pci_device_id hpwdt_blacklist[] = {
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) }, /* CL */
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{0}, /* terminate list */
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};
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/*
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* Watchdog operations
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*/
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static int hpwdt_start(struct watchdog_device *wdd)
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{
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int control = 0x81 | (pretimeout ? 0x4 : 0);
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int reload = SECS_TO_TICKS(wdd->timeout);
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dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%02x\n", reload, control);
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iowrite16(reload, hpwdt_timer_reg);
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iowrite8(control, hpwdt_timer_con);
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return 0;
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}
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static void hpwdt_stop(void)
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{
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unsigned long data;
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pr_debug("stop watchdog\n");
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data = ioread8(hpwdt_timer_con);
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data &= 0xFE;
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iowrite8(data, hpwdt_timer_con);
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}
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static int hpwdt_stop_core(struct watchdog_device *wdd)
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{
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hpwdt_stop();
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return 0;
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}
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static int hpwdt_ping(struct watchdog_device *wdd)
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{
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int reload = SECS_TO_TICKS(wdd->timeout);
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dev_dbg(wdd->parent, "ping watchdog 0x%08x\n", reload);
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iowrite16(reload, hpwdt_timer_reg);
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return 0;
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}
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static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd)
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{
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return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
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}
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static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val)
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{
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dev_dbg(wdd->parent, "set_timeout = %d\n", val);
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wdd->timeout = val;
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if (val <= wdd->pretimeout) {
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dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
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wdd->pretimeout = 0;
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pretimeout = 0;
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if (watchdog_active(wdd))
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hpwdt_start(wdd);
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}
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hpwdt_ping(wdd);
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return 0;
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}
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#ifdef CONFIG_HPWDT_NMI_DECODING
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static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req)
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{
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unsigned int val = 0;
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dev_dbg(wdd->parent, "set_pretimeout = %d\n", req);
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if (req) {
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val = PRETIMEOUT_SEC;
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if (val >= wdd->timeout)
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return -EINVAL;
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}
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if (val != req)
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dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val);
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wdd->pretimeout = val;
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pretimeout = !!val;
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if (watchdog_active(wdd))
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hpwdt_start(wdd);
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return 0;
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}
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static int hpwdt_my_nmi(void)
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{
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return ioread8(hpwdt_nmistat) & 0x6;
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}
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/*
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* NMI Handler
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*/
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static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
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{
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unsigned int mynmi = hpwdt_my_nmi();
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static char panic_msg[] =
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"00: An NMI occurred. Depending on your system the reason "
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"for the NMI is logged in any one of the following resources:\n"
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"1. Integrated Management Log (IML)\n"
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"2. OA Syslog\n"
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"3. OA Forward Progress Log\n"
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"4. iLO Event Log";
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if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi)
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return NMI_DONE;
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if (ilo5 && !pretimeout && !mynmi)
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return NMI_DONE;
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hpwdt_stop();
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hex_byte_pack(panic_msg, mynmi);
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nmi_panic(regs, panic_msg);
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return NMI_HANDLED;
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}
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#endif /* CONFIG_HPWDT_NMI_DECODING */
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static const struct watchdog_info ident = {
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.options = WDIOF_PRETIMEOUT |
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WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.identity = "HPE iLO2+ HW Watchdog Timer",
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};
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/*
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* Kernel interfaces
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*/
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static const struct watchdog_ops hpwdt_ops = {
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.owner = THIS_MODULE,
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.start = hpwdt_start,
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.stop = hpwdt_stop_core,
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.ping = hpwdt_ping,
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.set_timeout = hpwdt_settimeout,
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.get_timeleft = hpwdt_gettimeleft,
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#ifdef CONFIG_HPWDT_NMI_DECODING
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.set_pretimeout = hpwdt_set_pretimeout,
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#endif
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};
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static struct watchdog_device hpwdt_dev = {
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.info = &ident,
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.ops = &hpwdt_ops,
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.min_timeout = 1,
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.max_timeout = HPWDT_MAX_TIMER,
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.timeout = DEFAULT_MARGIN,
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.pretimeout = PRETIMEOUT_SEC,
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};
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/*
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* Init & Exit
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*/
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static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
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{
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#ifdef CONFIG_HPWDT_NMI_DECODING
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int retval;
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/*
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* Only one function can register for NMI_UNKNOWN
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*/
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retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
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if (retval)
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goto error;
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retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
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if (retval)
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goto error1;
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retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
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if (retval)
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goto error2;
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dev_info(&dev->dev,
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"HPE Watchdog Timer Driver: NMI decoding initialized\n");
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return 0;
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error2:
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unregister_nmi_handler(NMI_SERR, "hpwdt");
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error1:
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unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
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error:
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dev_warn(&dev->dev,
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"Unable to register a die notifier (err=%d).\n",
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retval);
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return retval;
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#endif /* CONFIG_HPWDT_NMI_DECODING */
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return 0;
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}
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static void hpwdt_exit_nmi_decoding(void)
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{
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#ifdef CONFIG_HPWDT_NMI_DECODING
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unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
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unregister_nmi_handler(NMI_SERR, "hpwdt");
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unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
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#endif
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}
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static int hpwdt_init_one(struct pci_dev *dev,
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const struct pci_device_id *ent)
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{
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int retval;
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/*
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* First let's find out if we are on an iLO2+ server. We will
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* not run on a legacy ASM box.
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* So we only support the G5 ProLiant servers and higher.
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*/
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if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
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dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
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dev_warn(&dev->dev,
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"This server does not have an iLO2+ ASIC.\n");
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return -ENODEV;
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}
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if (pci_match_id(hpwdt_blacklist, dev)) {
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dev_dbg(&dev->dev, "Not supported on this device\n");
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return -ENODEV;
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}
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if (pci_enable_device(dev)) {
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dev_warn(&dev->dev,
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"Not possible to enable PCI Device: 0x%x:0x%x.\n",
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ent->vendor, ent->device);
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return -ENODEV;
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}
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pci_mem_addr = pci_iomap(dev, 1, 0x80);
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if (!pci_mem_addr) {
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dev_warn(&dev->dev,
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"Unable to detect the iLO2+ server memory.\n");
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retval = -ENOMEM;
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goto error_pci_iomap;
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}
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hpwdt_nmistat = pci_mem_addr + 0x6e;
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hpwdt_timer_reg = pci_mem_addr + 0x70;
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hpwdt_timer_con = pci_mem_addr + 0x72;
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/* Make sure that timer is disabled until /dev/watchdog is opened */
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hpwdt_stop();
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/* Initialize NMI Decoding functionality */
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retval = hpwdt_init_nmi_decoding(dev);
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if (retval != 0)
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goto error_init_nmi_decoding;
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watchdog_set_nowayout(&hpwdt_dev, nowayout);
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watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL);
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if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) {
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dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n");
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pretimeout = 0;
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}
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hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0;
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hpwdt_dev.parent = &dev->dev;
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retval = watchdog_register_device(&hpwdt_dev);
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if (retval < 0) {
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dev_err(&dev->dev, "watchdog register failed: %d.\n", retval);
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goto error_wd_register;
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}
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dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n",
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HPWDT_VERSION);
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dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n",
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hpwdt_dev.timeout, nowayout);
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dev_info(&dev->dev, "pretimeout: %s.\n",
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pretimeout ? "on" : "off");
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if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR)
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ilo5 = true;
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return 0;
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error_wd_register:
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hpwdt_exit_nmi_decoding();
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error_init_nmi_decoding:
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pci_iounmap(dev, pci_mem_addr);
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error_pci_iomap:
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pci_disable_device(dev);
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return retval;
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}
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static void hpwdt_exit(struct pci_dev *dev)
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{
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if (!nowayout)
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hpwdt_stop();
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watchdog_unregister_device(&hpwdt_dev);
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hpwdt_exit_nmi_decoding();
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pci_iounmap(dev, pci_mem_addr);
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pci_disable_device(dev);
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}
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static struct pci_driver hpwdt_driver = {
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.name = "hpwdt",
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.id_table = hpwdt_devices,
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.probe = hpwdt_init_one,
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.remove = hpwdt_exit,
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};
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MODULE_AUTHOR("Tom Mingarelli");
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MODULE_DESCRIPTION("hpe watchdog driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(HPWDT_VERSION);
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module_param(soft_margin, int, 0);
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MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
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module_param_named(timeout, soft_margin, int, 0);
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MODULE_PARM_DESC(timeout, "Alias of soft_margin");
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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#ifdef CONFIG_HPWDT_NMI_DECODING
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module_param(pretimeout, bool, 0);
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MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled");
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#endif
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module_pci_driver(hpwdt_driver);
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