mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 04:36:56 +07:00
2e8a5942f8
Actually enabling coherency and adding a CPU on a SMP group are two different operations which can be done separately. This patch splits this in two functions. Moreover as they use common pattern, this patch also creates local low level functions (ll_get_coherency_base and ll_get_cpuid) to be used by the exposed functions (ll_add_cpu_to_smp_group and ll_enable_coherency) Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397488214-20685-6-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
41 lines
1.1 KiB
ArmAsm
41 lines
1.1 KiB
ArmAsm
/*
|
|
* SMP support: Entry point for secondary CPUs
|
|
*
|
|
* Copyright (C) 2012 Marvell
|
|
*
|
|
* Yehuda Yitschak <yehuday@marvell.com>
|
|
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*
|
|
* This file implements the assembly entry point for secondary CPUs in
|
|
* an SMP kernel. The only thing we need to do is to add the CPU to
|
|
* the coherency fabric by writing to 2 registers. Currently the base
|
|
* register addresses are hard coded due to the early initialisation
|
|
* problems.
|
|
*/
|
|
|
|
#include <linux/linkage.h>
|
|
#include <linux/init.h>
|
|
|
|
#include <asm/assembler.h>
|
|
|
|
/*
|
|
* Armada XP specific entry point for secondary CPUs.
|
|
* We add the CPU to the coherency fabric and then jump to secondary
|
|
* startup
|
|
*/
|
|
ENTRY(armada_xp_secondary_startup)
|
|
ARM_BE8(setend be ) @ go BE8 if entered LE
|
|
|
|
bl ll_add_cpu_to_smp_group
|
|
|
|
bl ll_enable_coherency
|
|
|
|
b secondary_startup
|
|
|
|
ENDPROC(armada_xp_secondary_startup)
|