mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c93b8a3963
Use the new 'cpu_has_xfeatures()' function to query AVX CPU support. This has the following advantages to the driver: - Decouples the driver from FPU internals: it's now only using <asm/fpu/api.h>. - Removes detection complexity from the driver, no more raw XGETBV instruction - Shrinks the code a bit. - Standardizes feature name error message printouts across drivers There are also advantages to the x86 FPU code: once all drivers are decoupled from internals we can move them out of common headers and we'll also be able to remove xcr.h. Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
191 lines
5.2 KiB
C
191 lines
5.2 KiB
C
/*
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* Cryptographic API.
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*
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* Glue code for the SHA512 Secure Hash Algorithm assembler
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* implementation using supplemental SSE3 / AVX / AVX2 instructions.
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*
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* This file is based on sha512_generic.c
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*
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* Copyright (C) 2013 Intel Corporation
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* Author: Tim Chen <tim.c.chen@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <crypto/internal/hash.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/cryptohash.h>
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#include <linux/types.h>
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#include <crypto/sha.h>
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#include <crypto/sha512_base.h>
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#include <asm/fpu/api.h>
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#include <linux/string.h>
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asmlinkage void sha512_transform_ssse3(u64 *digest, const char *data,
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u64 rounds);
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#ifdef CONFIG_AS_AVX
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asmlinkage void sha512_transform_avx(u64 *digest, const char *data,
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u64 rounds);
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#endif
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#ifdef CONFIG_AS_AVX2
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asmlinkage void sha512_transform_rorx(u64 *digest, const char *data,
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u64 rounds);
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#endif
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static void (*sha512_transform_asm)(u64 *, const char *, u64);
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static int sha512_ssse3_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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struct sha512_state *sctx = shash_desc_ctx(desc);
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if (!irq_fpu_usable() ||
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(sctx->count[0] % SHA512_BLOCK_SIZE) + len < SHA512_BLOCK_SIZE)
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return crypto_sha512_update(desc, data, len);
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/* make sure casting to sha512_block_fn() is safe */
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BUILD_BUG_ON(offsetof(struct sha512_state, state) != 0);
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kernel_fpu_begin();
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sha512_base_do_update(desc, data, len,
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(sha512_block_fn *)sha512_transform_asm);
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kernel_fpu_end();
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return 0;
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}
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static int sha512_ssse3_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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if (!irq_fpu_usable())
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return crypto_sha512_finup(desc, data, len, out);
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kernel_fpu_begin();
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if (len)
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sha512_base_do_update(desc, data, len,
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(sha512_block_fn *)sha512_transform_asm);
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sha512_base_do_finalize(desc, (sha512_block_fn *)sha512_transform_asm);
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kernel_fpu_end();
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return sha512_base_finish(desc, out);
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}
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/* Add padding and return the message digest. */
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static int sha512_ssse3_final(struct shash_desc *desc, u8 *out)
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{
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return sha512_ssse3_finup(desc, NULL, 0, out);
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}
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static struct shash_alg algs[] = { {
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.digestsize = SHA512_DIGEST_SIZE,
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.init = sha512_base_init,
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.update = sha512_ssse3_update,
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.final = sha512_ssse3_final,
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.finup = sha512_ssse3_finup,
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.descsize = sizeof(struct sha512_state),
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.base = {
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.cra_name = "sha512",
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.cra_driver_name = "sha512-ssse3",
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.cra_priority = 150,
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.cra_flags = CRYPTO_ALG_TYPE_SHASH,
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.cra_blocksize = SHA512_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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}, {
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.digestsize = SHA384_DIGEST_SIZE,
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.init = sha384_base_init,
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.update = sha512_ssse3_update,
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.final = sha512_ssse3_final,
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.finup = sha512_ssse3_finup,
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.descsize = sizeof(struct sha512_state),
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.base = {
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.cra_name = "sha384",
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.cra_driver_name = "sha384-ssse3",
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.cra_priority = 150,
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.cra_flags = CRYPTO_ALG_TYPE_SHASH,
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.cra_blocksize = SHA384_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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} };
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#ifdef CONFIG_AS_AVX
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static bool __init avx_usable(void)
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{
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if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, NULL)) {
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if (cpu_has_avx)
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pr_info("AVX detected but unusable.\n");
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return false;
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}
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return true;
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}
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#endif
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static int __init sha512_ssse3_mod_init(void)
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{
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/* test for SSSE3 first */
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if (cpu_has_ssse3)
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sha512_transform_asm = sha512_transform_ssse3;
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#ifdef CONFIG_AS_AVX
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/* allow AVX to override SSSE3, it's a little faster */
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if (avx_usable()) {
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#ifdef CONFIG_AS_AVX2
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if (boot_cpu_has(X86_FEATURE_AVX2))
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sha512_transform_asm = sha512_transform_rorx;
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else
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#endif
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sha512_transform_asm = sha512_transform_avx;
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}
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#endif
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if (sha512_transform_asm) {
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#ifdef CONFIG_AS_AVX
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if (sha512_transform_asm == sha512_transform_avx)
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pr_info("Using AVX optimized SHA-512 implementation\n");
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#ifdef CONFIG_AS_AVX2
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else if (sha512_transform_asm == sha512_transform_rorx)
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pr_info("Using AVX2 optimized SHA-512 implementation\n");
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#endif
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else
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#endif
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pr_info("Using SSSE3 optimized SHA-512 implementation\n");
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return crypto_register_shashes(algs, ARRAY_SIZE(algs));
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}
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pr_info("Neither AVX nor SSSE3 is available/usable.\n");
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return -ENODEV;
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}
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static void __exit sha512_ssse3_mod_fini(void)
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{
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crypto_unregister_shashes(algs, ARRAY_SIZE(algs));
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}
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module_init(sha512_ssse3_mod_init);
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module_exit(sha512_ssse3_mod_fini);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, Supplemental SSE3 accelerated");
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MODULE_ALIAS_CRYPTO("sha512");
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MODULE_ALIAS_CRYPTO("sha384");
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