Laurent Pinchart b671b98169 dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits ... [ Upstream commit 9f007e7b6643799e2a6538a5fe04f51c371c6657 ] While the descriptor ID is stored in a 32-bit field in the hardware descriptor, only 16 bits are used by the hardware and are reported through the XILINX_DPDMA_CH_DESC_ID register. Failure to handle the wrap-around results in a descriptor ID mismatch after 65536 frames. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Jianqiang Chen <jianqiang.chen@xilinx.com> Reviewed-by: Jianqiang Chen <jianqiang.chen@xilinx.com> Link: https://lore.kernel.org/r/20210520152420.23986-5-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-06-30 08:47:19 -04:00
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Makefile	dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver	2020-07-17 11:37:59 +05:30
xilinx_dma.c	dmaengine: xilinx_dma: fix mixed_enum_type coverity warning	2021-01-17 14:17:02 +01:00
xilinx_dpdma.c	dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits	2021-06-30 08:47:19 -04:00
zynqmp_dma.c	dmaengine: zynqmp_dma: Fix PM reference leak in zynqmp_dma_alloc_chan_resourc()	2021-06-30 08:47:18 -04:00