mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
6af4ea0ba7
same story as with oprofilefs_mkdir() Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
237 lines
5.0 KiB
C
237 lines
5.0 KiB
C
/*
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* AVR32 Performance Counter Driver
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*
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* Copyright (C) 2005-2007 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Author: Ronny Pedersen
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*/
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/oprofile.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <asm/sysreg.h>
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#define AVR32_PERFCTR_IRQ_GROUP 0
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#define AVR32_PERFCTR_IRQ_LINE 1
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void avr32_backtrace(struct pt_regs * const regs, unsigned int depth);
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enum { PCCNT, PCNT0, PCNT1, NR_counter };
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struct avr32_perf_counter {
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unsigned long enabled;
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unsigned long event;
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unsigned long count;
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unsigned long unit_mask;
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unsigned long kernel;
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unsigned long user;
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u32 ie_mask;
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u32 flag_mask;
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};
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static struct avr32_perf_counter counter[NR_counter] = {
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{
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.ie_mask = SYSREG_BIT(IEC),
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.flag_mask = SYSREG_BIT(FC),
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}, {
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.ie_mask = SYSREG_BIT(IE0),
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.flag_mask = SYSREG_BIT(F0),
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}, {
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.ie_mask = SYSREG_BIT(IE1),
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.flag_mask = SYSREG_BIT(F1),
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},
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};
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static void avr32_perf_counter_reset(void)
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{
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/* Reset all counter and disable/clear all interrupts */
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sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
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| SYSREG_BIT(PCCR_C)
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| SYSREG_BIT(FC)
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| SYSREG_BIT(F0)
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| SYSREG_BIT(F1)));
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}
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static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
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{
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struct avr32_perf_counter *ctr = dev_id;
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struct pt_regs *regs;
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u32 pccr;
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if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
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& (1 << AVR32_PERFCTR_IRQ_LINE))))
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return IRQ_NONE;
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regs = get_irq_regs();
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pccr = sysreg_read(PCCR);
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/* Clear the interrupt flags we're about to handle */
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sysreg_write(PCCR, pccr);
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/* PCCNT */
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if (ctr->enabled && (pccr & ctr->flag_mask)) {
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sysreg_write(PCCNT, -ctr->count);
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oprofile_add_sample(regs, PCCNT);
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}
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ctr++;
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/* PCNT0 */
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if (ctr->enabled && (pccr & ctr->flag_mask)) {
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sysreg_write(PCNT0, -ctr->count);
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oprofile_add_sample(regs, PCNT0);
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}
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ctr++;
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/* PCNT1 */
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if (ctr->enabled && (pccr & ctr->flag_mask)) {
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sysreg_write(PCNT1, -ctr->count);
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oprofile_add_sample(regs, PCNT1);
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}
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return IRQ_HANDLED;
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}
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static int avr32_perf_counter_create_files(struct dentry *root)
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{
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struct dentry *dir;
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unsigned int i;
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char filename[4];
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for (i = 0; i < NR_counter; i++) {
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snprintf(filename, sizeof(filename), "%u", i);
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dir = oprofilefs_mkdir(root, filename);
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oprofilefs_create_ulong(dir, "enabled",
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&counter[i].enabled);
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oprofilefs_create_ulong(dir, "event",
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&counter[i].event);
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oprofilefs_create_ulong(dir, "count",
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&counter[i].count);
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/* Dummy entries */
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oprofilefs_create_ulong(dir, "kernel",
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&counter[i].kernel);
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oprofilefs_create_ulong(dir, "user",
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&counter[i].user);
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oprofilefs_create_ulong(dir, "unit_mask",
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&counter[i].unit_mask);
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}
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return 0;
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}
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static int avr32_perf_counter_setup(void)
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{
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struct avr32_perf_counter *ctr;
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u32 pccr;
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int ret;
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int i;
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pr_debug("avr32_perf_counter_setup\n");
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if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
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printk(KERN_ERR
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"oprofile: setup: perf counter already enabled\n");
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return -EBUSY;
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}
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ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
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avr32_perf_counter_interrupt, IRQF_SHARED,
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"oprofile", counter);
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if (ret)
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return ret;
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avr32_perf_counter_reset();
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pccr = 0;
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for (i = PCCNT; i < NR_counter; i++) {
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ctr = &counter[i];
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if (!ctr->enabled)
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continue;
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pr_debug("enabling counter %d...\n", i);
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pccr |= ctr->ie_mask;
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switch (i) {
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case PCCNT:
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/* PCCNT always counts cycles, so no events */
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sysreg_write(PCCNT, -ctr->count);
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break;
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case PCNT0:
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pccr |= SYSREG_BF(CONF0, ctr->event);
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sysreg_write(PCNT0, -ctr->count);
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break;
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case PCNT1:
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pccr |= SYSREG_BF(CONF1, ctr->event);
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sysreg_write(PCNT1, -ctr->count);
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break;
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}
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}
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pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
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sysreg_write(PCCR, pccr);
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return 0;
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}
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static void avr32_perf_counter_shutdown(void)
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{
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pr_debug("avr32_perf_counter_shutdown\n");
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avr32_perf_counter_reset();
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free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
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}
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static int avr32_perf_counter_start(void)
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{
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pr_debug("avr32_perf_counter_start\n");
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sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
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return 0;
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}
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static void avr32_perf_counter_stop(void)
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{
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pr_debug("avr32_perf_counter_stop\n");
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sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
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}
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static struct oprofile_operations avr32_perf_counter_ops __initdata = {
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.create_files = avr32_perf_counter_create_files,
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.setup = avr32_perf_counter_setup,
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.shutdown = avr32_perf_counter_shutdown,
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.start = avr32_perf_counter_start,
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.stop = avr32_perf_counter_stop,
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.cpu_type = "avr32",
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};
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int __init oprofile_arch_init(struct oprofile_operations *ops)
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{
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if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
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return -ENODEV;
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memcpy(ops, &avr32_perf_counter_ops,
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sizeof(struct oprofile_operations));
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ops->backtrace = avr32_backtrace;
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printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
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return 0;
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}
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void oprofile_arch_exit(void)
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{
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}
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