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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5ae7f87a56
The arch_timer irq numbers (or PPI numbers) are implementation dependent, so the host virtual timer irq number can be different from guest virtual timer irq number. This patch ensures that host virtual timer irq number is read from DTB and guest virtual timer irq is determined based on vcpu target type. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/compiler.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kvm_host.h>
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#include <linux/kvm.h>
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#include <asm/unified.h>
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#include <asm/ptrace.h>
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#include <asm/cputype.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_coproc.h>
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#include <kvm/arm_arch_timer.h>
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/******************************************************************************
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* Cortex-A15 Reset Values
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*/
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static const int a15_max_cpu_idx = 3;
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static struct kvm_regs a15_regs_reset = {
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.usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
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};
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static const struct kvm_irq_level a15_vtimer_irq = {
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.irq = 27,
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.level = 1,
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};
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/*******************************************************************************
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* Exported reset function
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*/
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/**
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* kvm_reset_vcpu - sets core registers and cp15 registers to reset value
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* @vcpu: The VCPU pointer
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*
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* This function finds the right table above and sets the registers on the
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* virtual CPU struct to their architectually defined reset values.
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*/
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int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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{
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struct kvm_regs *cpu_reset;
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const struct kvm_irq_level *cpu_vtimer_irq;
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switch (vcpu->arch.target) {
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case KVM_ARM_TARGET_CORTEX_A15:
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if (vcpu->vcpu_id > a15_max_cpu_idx)
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return -EINVAL;
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cpu_reset = &a15_regs_reset;
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vcpu->arch.midr = read_cpuid_id();
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cpu_vtimer_irq = &a15_vtimer_irq;
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break;
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default:
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return -ENODEV;
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}
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/* Reset core registers */
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memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs));
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/* Reset CP15 registers */
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kvm_reset_coprocs(vcpu);
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/* Reset arch_timer context */
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kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
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return 0;
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}
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