mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 09:56:53 +07:00
19df0c2fef
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
133 lines
2.3 KiB
ArmAsm
133 lines
2.3 KiB
ArmAsm
/* ld script to make FRV Linux kernel
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* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
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*/
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OUTPUT_FORMAT("elf32-frv", "elf32-frv", "elf32-frv")
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OUTPUT_ARCH(frv)
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ENTRY(_start)
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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jiffies = jiffies_64 + 4;
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__page_offset = CONFIG_PAGE_OFFSET; /* start of area covered by struct pages */
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__kernel_image_start = __page_offset; /* address at which kernel image resides */
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SECTIONS
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{
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. = __kernel_image_start;
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/* discardable initialisation code and data */
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. = ALIGN(PAGE_SIZE); /* Init code and data */
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__init_begin = .;
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_sinittext = .;
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.init.text : {
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HEAD_TEXT
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#ifndef CONFIG_DEBUG_INFO
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INIT_TEXT
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EXIT_TEXT
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EXIT_DATA
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*(.exitcall.exit)
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#endif
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}
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_einittext = .;
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INIT_DATA_SECTION(8)
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PERCPU(L1_CACHE_BYTES, 4096)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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.trap : {
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/* trap table management - read entry-table.S before modifying */
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. = ALIGN(8192);
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__trap_tables = .;
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*(.trap.user)
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*(.trap.kernel)
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. = ALIGN(4096);
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*(.trap.break)
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}
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/* Text and read-only data */
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. = ALIGN(4);
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_text = .;
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_stext = .;
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.text : {
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*(.text..start)
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*(.text..entry)
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*(.text..break)
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*(.text..tlbmiss)
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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#ifdef CONFIG_DEBUG_INFO
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INIT_TEXT
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EXIT_TEXT
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*(.exitcall.exit)
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#endif
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*(.fixup)
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*(.gnu.warning)
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*(.exitcall.exit)
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} = 0x9090
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_etext = .; /* End of text section */
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RODATA
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.rodata : {
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*(.trap.vector)
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/* this clause must not be modified - the ordering and adjacency are imperative */
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__trap_fixup_tables = .;
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*(.trap.fixup.user .trap.fixup.kernel)
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}
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EXCEPTION_TABLE(8)
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_sdata = .;
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.data : { /* Data */
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INIT_TASK_DATA(THREAD_SIZE)
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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DATA_DATA
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*(.data.*)
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EXIT_DATA
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CONSTRUCTORS
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}
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_edata = .; /* End of data section */
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/* GP section */
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. = ALIGN(L1_CACHE_BYTES);
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_gp = . + 2048;
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PROVIDE (gp = _gp);
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.sdata : { *(.sdata .sdata.*) }
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/* BSS */
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. = ALIGN(L1_CACHE_BYTES);
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__bss_start = .;
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.sbss : { *(.sbss .sbss.*) }
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.bss : { *(.bss .bss.*) }
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.bss..stack : { *(.bss) }
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__bss_stop = .;
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_end = . ;
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. = ALIGN(PAGE_SIZE);
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__kernel_image_end = .;
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STABS_DEBUG
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DWARF_DEBUG
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.comment 0 : { *(.comment) }
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DISCARDS
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}
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__kernel_image_size_no_bss = __bss_start - __kernel_image_start;
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