mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 15:16:41 +07:00
153e66f513
The pl330 driver properly reports that it does not have residue reporting support, which means the PCM dmanegine driver is able to figure this out on its own. So there is no need to set the flag manually. Removing the flag has the advantage that once the pl330 driver gains support for residue reporting it will automatically be used by the generic dmaengine PCM driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
277 lines
6.5 KiB
C
277 lines
6.5 KiB
C
/*
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* Copyright (C) 2012-2013, Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#define AXI_I2S_REG_RESET 0x00
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#define AXI_I2S_REG_CTRL 0x04
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#define AXI_I2S_REG_CLK_CTRL 0x08
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#define AXI_I2S_REG_STATUS 0x10
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#define AXI_I2S_REG_RX_FIFO 0x28
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#define AXI_I2S_REG_TX_FIFO 0x2C
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#define AXI_I2S_RESET_GLOBAL BIT(0)
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#define AXI_I2S_RESET_TX_FIFO BIT(1)
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#define AXI_I2S_RESET_RX_FIFO BIT(2)
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#define AXI_I2S_CTRL_TX_EN BIT(0)
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#define AXI_I2S_CTRL_RX_EN BIT(1)
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/* The frame size is configurable, but for now we always set it 64 bit */
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#define AXI_I2S_BITS_PER_FRAME 64
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struct axi_i2s {
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struct regmap *regmap;
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struct clk *clk;
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struct clk *clk_ref;
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struct snd_soc_dai_driver dai_driver;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct snd_ratnum ratnum;
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struct snd_pcm_hw_constraint_ratnums rate_constraints;
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};
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static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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unsigned int mask, val;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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mask = AXI_I2S_CTRL_RX_EN;
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else
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mask = AXI_I2S_CTRL_TX_EN;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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val = mask;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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val = 0;
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break;
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default:
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return -EINVAL;
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}
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regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val);
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return 0;
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}
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static int axi_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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unsigned int bclk_div, word_size;
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unsigned int bclk_rate;
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bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME;
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word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1;
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bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1;
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regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) |
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bclk_div);
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return 0;
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}
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static int axi_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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uint32_t mask;
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int ret;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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mask = AXI_I2S_RESET_RX_FIFO;
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else
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mask = AXI_I2S_RESET_TX_FIFO;
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regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask);
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ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_RATE,
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&i2s->rate_constraints);
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if (ret)
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return ret;
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return clk_prepare_enable(i2s->clk_ref);
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}
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static void axi_i2s_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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clk_disable_unprepare(i2s->clk_ref);
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}
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static int axi_i2s_dai_probe(struct snd_soc_dai *dai)
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{
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struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
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&i2s->capture_dma_data);
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return 0;
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}
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static const struct snd_soc_dai_ops axi_i2s_dai_ops = {
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.startup = axi_i2s_startup,
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.shutdown = axi_i2s_shutdown,
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.trigger = axi_i2s_trigger,
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.hw_params = axi_i2s_hw_params,
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};
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static struct snd_soc_dai_driver axi_i2s_dai = {
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.probe = axi_i2s_dai_probe,
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.playback = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_KNOT,
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.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
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},
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.capture = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_KNOT,
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.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
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},
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.ops = &axi_i2s_dai_ops,
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.symmetric_rates = 1,
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};
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static const struct snd_soc_component_driver axi_i2s_component = {
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.name = "axi-i2s",
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};
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static const struct regmap_config axi_i2s_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = AXI_I2S_REG_STATUS,
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};
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static int axi_i2s_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct axi_i2s *i2s;
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void __iomem *base;
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int ret;
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i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
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if (!i2s)
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return -ENOMEM;
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platform_set_drvdata(pdev, i2s);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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&axi_i2s_regmap_config);
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if (IS_ERR(i2s->regmap))
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return PTR_ERR(i2s->regmap);
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i2s->clk = devm_clk_get(&pdev->dev, "axi");
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if (IS_ERR(i2s->clk))
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return PTR_ERR(i2s->clk);
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i2s->clk_ref = devm_clk_get(&pdev->dev, "ref");
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if (IS_ERR(i2s->clk_ref))
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return PTR_ERR(i2s->clk_ref);
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ret = clk_prepare_enable(i2s->clk);
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if (ret)
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return ret;
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i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO;
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i2s->playback_dma_data.addr_width = 4;
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i2s->playback_dma_data.maxburst = 1;
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i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO;
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i2s->capture_dma_data.addr_width = 4;
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i2s->capture_dma_data.maxburst = 1;
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i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME;
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i2s->ratnum.den_step = 1;
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i2s->ratnum.den_min = 1;
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i2s->ratnum.den_max = 64;
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i2s->rate_constraints.rats = &i2s->ratnum;
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i2s->rate_constraints.nrats = 1;
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regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL);
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ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component,
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&axi_i2s_dai, 1);
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if (ret)
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goto err_clk_disable;
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
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if (ret)
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goto err_clk_disable;
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err_clk_disable:
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clk_disable_unprepare(i2s->clk);
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return ret;
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}
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static int axi_i2s_dev_remove(struct platform_device *pdev)
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{
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struct axi_i2s *i2s = platform_get_drvdata(pdev);
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clk_disable_unprepare(i2s->clk);
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return 0;
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}
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static const struct of_device_id axi_i2s_of_match[] = {
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{ .compatible = "adi,axi-i2s-1.00.a", },
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{},
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};
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MODULE_DEVICE_TABLE(of, axi_i2s_of_match);
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static struct platform_driver axi_i2s_driver = {
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.driver = {
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.name = "axi-i2s",
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.owner = THIS_MODULE,
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.of_match_table = axi_i2s_of_match,
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},
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.probe = axi_i2s_probe,
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.remove = axi_i2s_dev_remove,
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};
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module_platform_driver(axi_i2s_driver);
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MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
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MODULE_DESCRIPTION("AXI I2S driver");
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MODULE_LICENSE("GPL");
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