linux_dsm_epyc7002/arch/mips/netlogic/common
Jayachandran C a69ba6293d MIPS: Netlogic: Split XLP L1 i-cache among threads
Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
..
earlycons.c MIPS: Netlogic: early console fix 2012-07-24 18:24:44 +02:00
irq.c MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit 2013-02-17 00:15:19 +01:00
Makefile MIPS: Netlogic: Merge some of XLR/XLP wakup code 2011-12-07 22:04:56 +00:00
smp.c MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit 2013-02-17 00:15:19 +01:00
smpboot.S MIPS: Netlogic: Split XLP L1 i-cache among threads 2013-02-17 00:15:20 +01:00
time.c MIPS: Netlogic: Move code common with XLP to common/ 2011-12-07 22:04:55 +00:00