mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 23:46:40 +07:00
45c3eb7d3a
Based on earlier discussions[1] we attempted to find a suitable
location for the omap DMA header in commit 2b6c4e73
(ARM: OMAP:
DMA: Move plat/dma.h to plat-omap/dma-omap.h) until the conversion
to dmaengine is complete.
Unfortunately that was before I was able to try to test compile
of the ARM multiplatform builds for omap2+, and the end result
was not very good.
So I'm creating yet another all over the place patch to cut the
last dependency for building omap2+ for ARM multiplatform. After
this, we have finally removed the driver dependencies to the
arch/arm code, except for few drivers that are being worked on.
The other option was to make the <plat-omap/dma-omap.h> path
to work, but we'd have to add some new header directory to for
multiplatform builds.
Or we would have to manually include arch/arm/plat-omap/include
again from arch/arm/Makefile for omap2+.
Neither of these alternatives sound appealing as they will
likely lead addition of various other headers exposed to the
drivers, which we want to avoid for the multiplatform kernels.
Since we already have a minimal include/linux/omap-dma.h,
let's just use that instead and add a note to it to not
use the custom omap DMA functions any longer where possible.
Note that converting omap DMA to dmaengine depends on
dmaengine supporting automatically incrementing the FIFO
address at the device end, and converting all the remaining
legacy drivers. So it's going to be few more merge windows.
[1] https://patchwork.kernel.org/patch/1519591/#
cc: Russell King <linux@arm.linux.org.uk>
cc: Kevin Hilman <khilman@ti.com>
cc: "Benoît Cousson" <b-cousson@ti.com>
cc: Herbert Xu <herbert@gondor.apana.org.au>
cc: "David S. Miller" <davem@davemloft.net>
cc: Vinod Koul <vinod.koul@intel.com>
cc: Dan Williams <djbw@fb.com>
cc: Mauro Carvalho Chehab <mchehab@infradead.org>
cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
cc: David Woodhouse <dwmw2@infradead.org>
cc: Kyungmin Park <kyungmin.park@samsung.com>
cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
cc: Hans Verkuil <hans.verkuil@cisco.com>
cc: Vaibhav Hiremath <hvaibhav@ti.com>
cc: Lokesh Vutla <lokeshvutla@ti.com>
cc: Rusty Russell <rusty@rustcorp.com.au>
cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
cc: Afzal Mohammed <afzal@ti.com>
cc: linux-crypto@vger.kernel.org
cc: linux-media@vger.kernel.org
cc: linux-mtd@lists.infradead.org
cc: linux-usb@vger.kernel.org
cc: linux-fbdev@vger.kernel.org
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
448 lines
8.9 KiB
C
448 lines
8.9 KiB
C
/*
|
|
* linux/arch/arm/mach-omap1/mcbsp.c
|
|
*
|
|
* Copyright (C) 2008 Instituto Nokia de Tecnologia
|
|
* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* Multichannel mode not supported.
|
|
*/
|
|
#include <linux/ioport.h>
|
|
#include <linux/module.h>
|
|
#include <linux/init.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/err.h>
|
|
#include <linux/io.h>
|
|
#include <linux/platform_device.h>
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/omap-dma.h>
|
|
#include <mach/mux.h>
|
|
#include "soc.h"
|
|
#include <linux/platform_data/asoc-ti-mcbsp.h>
|
|
|
|
#include <mach/irqs.h>
|
|
|
|
#include "iomap.h"
|
|
#include "dma.h"
|
|
|
|
#define DPS_RSTCT2_PER_EN (1 << 0)
|
|
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
|
|
|
|
static int dsp_use;
|
|
static struct clk *api_clk;
|
|
static struct clk *dsp_clk;
|
|
static struct platform_device **omap_mcbsp_devices;
|
|
|
|
static void omap1_mcbsp_request(unsigned int id)
|
|
{
|
|
/*
|
|
* On 1510, 1610 and 1710, McBSP1 and McBSP3
|
|
* are DSP public peripherals.
|
|
*/
|
|
if (id == 0 || id == 2) {
|
|
if (dsp_use++ == 0) {
|
|
api_clk = clk_get(NULL, "api_ck");
|
|
dsp_clk = clk_get(NULL, "dsp_ck");
|
|
if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
|
|
clk_enable(api_clk);
|
|
clk_enable(dsp_clk);
|
|
|
|
/*
|
|
* DSP external peripheral reset
|
|
* FIXME: This should be moved to dsp code
|
|
*/
|
|
__raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
|
|
DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static void omap1_mcbsp_free(unsigned int id)
|
|
{
|
|
if (id == 0 || id == 2) {
|
|
if (--dsp_use == 0) {
|
|
if (!IS_ERR(api_clk)) {
|
|
clk_disable(api_clk);
|
|
clk_put(api_clk);
|
|
}
|
|
if (!IS_ERR(dsp_clk)) {
|
|
clk_disable(dsp_clk);
|
|
clk_put(dsp_clk);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static struct omap_mcbsp_ops omap1_mcbsp_ops = {
|
|
.request = omap1_mcbsp_request,
|
|
.free = omap1_mcbsp_free,
|
|
};
|
|
|
|
#define OMAP7XX_MCBSP1_BASE 0xfffb1000
|
|
#define OMAP7XX_MCBSP2_BASE 0xfffb1800
|
|
|
|
#define OMAP1510_MCBSP1_BASE 0xe1011800
|
|
#define OMAP1510_MCBSP2_BASE 0xfffb1000
|
|
#define OMAP1510_MCBSP3_BASE 0xe1017000
|
|
|
|
#define OMAP1610_MCBSP1_BASE 0xe1011800
|
|
#define OMAP1610_MCBSP2_BASE 0xfffb1000
|
|
#define OMAP1610_MCBSP3_BASE 0xe1017000
|
|
|
|
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
|
|
struct resource omap7xx_mcbsp_res[][6] = {
|
|
{
|
|
{
|
|
.start = OMAP7XX_MCBSP1_BASE,
|
|
.end = OMAP7XX_MCBSP1_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_7XX_McBSP1RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_7XX_McBSP1TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP1_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP1_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
{
|
|
{
|
|
.start = OMAP7XX_MCBSP2_BASE,
|
|
.end = OMAP7XX_MCBSP2_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_7XX_McBSP2RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_7XX_McBSP2TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP3_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP3_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
};
|
|
|
|
#define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0]
|
|
|
|
static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
};
|
|
#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
|
|
#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
|
|
#else
|
|
#define omap7xx_mcbsp_res_0 NULL
|
|
#define omap7xx_mcbsp_pdata NULL
|
|
#define OMAP7XX_MCBSP_RES_SZ 0
|
|
#define OMAP7XX_MCBSP_COUNT 0
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_OMAP15XX
|
|
struct resource omap15xx_mcbsp_res[][6] = {
|
|
{
|
|
{
|
|
.start = OMAP1510_MCBSP1_BASE,
|
|
.end = OMAP1510_MCBSP1_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_McBSP1RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_McBSP1TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP1_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP1_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
{
|
|
{
|
|
.start = OMAP1510_MCBSP2_BASE,
|
|
.end = OMAP1510_MCBSP2_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_1510_SPI_RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_1510_SPI_TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP2_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP2_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
{
|
|
{
|
|
.start = OMAP1510_MCBSP3_BASE,
|
|
.end = OMAP1510_MCBSP3_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_McBSP3RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_McBSP3TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP3_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP3_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
};
|
|
|
|
#define omap15xx_mcbsp_res_0 omap15xx_mcbsp_res[0]
|
|
|
|
static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
};
|
|
#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
|
|
#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
|
|
#else
|
|
#define omap15xx_mcbsp_res_0 NULL
|
|
#define omap15xx_mcbsp_pdata NULL
|
|
#define OMAP15XX_MCBSP_RES_SZ 0
|
|
#define OMAP15XX_MCBSP_COUNT 0
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_OMAP16XX
|
|
struct resource omap16xx_mcbsp_res[][6] = {
|
|
{
|
|
{
|
|
.start = OMAP1610_MCBSP1_BASE,
|
|
.end = OMAP1610_MCBSP1_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_McBSP1RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_McBSP1TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP1_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP1_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
{
|
|
{
|
|
.start = OMAP1610_MCBSP2_BASE,
|
|
.end = OMAP1610_MCBSP2_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_1610_McBSP2_RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_1610_McBSP2_TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP2_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP2_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
{
|
|
{
|
|
.start = OMAP1610_MCBSP3_BASE,
|
|
.end = OMAP1610_MCBSP3_BASE + SZ_256,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = INT_McBSP3RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = INT_McBSP3TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "rx",
|
|
.start = OMAP_DMA_MCBSP3_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "tx",
|
|
.start = OMAP_DMA_MCBSP3_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
},
|
|
};
|
|
|
|
#define omap16xx_mcbsp_res_0 omap16xx_mcbsp_res[0]
|
|
|
|
static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
{
|
|
.ops = &omap1_mcbsp_ops,
|
|
},
|
|
};
|
|
#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
|
|
#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
|
|
#else
|
|
#define omap16xx_mcbsp_res_0 NULL
|
|
#define omap16xx_mcbsp_pdata NULL
|
|
#define OMAP16XX_MCBSP_RES_SZ 0
|
|
#define OMAP16XX_MCBSP_COUNT 0
|
|
#endif
|
|
|
|
static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
|
|
struct omap_mcbsp_platform_data *config, int size)
|
|
{
|
|
int i;
|
|
|
|
omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
|
|
GFP_KERNEL);
|
|
if (!omap_mcbsp_devices) {
|
|
printk(KERN_ERR "Could not register McBSP devices\n");
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < size; i++) {
|
|
struct platform_device *new_mcbsp;
|
|
int ret;
|
|
|
|
new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
|
|
if (!new_mcbsp)
|
|
continue;
|
|
platform_device_add_resources(new_mcbsp, &res[i * res_count],
|
|
res_count);
|
|
config[i].reg_size = 2;
|
|
config[i].reg_step = 2;
|
|
new_mcbsp->dev.platform_data = &config[i];
|
|
ret = platform_device_add(new_mcbsp);
|
|
if (ret) {
|
|
platform_device_put(new_mcbsp);
|
|
continue;
|
|
}
|
|
omap_mcbsp_devices[i] = new_mcbsp;
|
|
}
|
|
}
|
|
|
|
static int __init omap1_mcbsp_init(void)
|
|
{
|
|
if (!cpu_class_is_omap1())
|
|
return -ENODEV;
|
|
|
|
if (cpu_is_omap7xx())
|
|
omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0,
|
|
OMAP7XX_MCBSP_RES_SZ,
|
|
omap7xx_mcbsp_pdata,
|
|
OMAP7XX_MCBSP_COUNT);
|
|
|
|
if (cpu_is_omap15xx())
|
|
omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0,
|
|
OMAP15XX_MCBSP_RES_SZ,
|
|
omap15xx_mcbsp_pdata,
|
|
OMAP15XX_MCBSP_COUNT);
|
|
|
|
if (cpu_is_omap16xx())
|
|
omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res_0,
|
|
OMAP16XX_MCBSP_RES_SZ,
|
|
omap16xx_mcbsp_pdata,
|
|
OMAP16XX_MCBSP_COUNT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(omap1_mcbsp_init);
|