mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 21:16:02 +07:00
f6ffbd4fc1
This replaces the repetitive GPL-2.0 license text in code and header files with the SPDX tags. Generated hardware headers aren't changed, as any changes there need to be done in the upstream rnndb repository. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
390 lines
8.9 KiB
C
390 lines
8.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015-2018 Etnaviv Project
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*/
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#include "common.xml.h"
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#include "etnaviv_cmdbuf.h"
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#include "etnaviv_drv.h"
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#include "etnaviv_gem.h"
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#include "etnaviv_gpu.h"
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#include "etnaviv_iommu.h"
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#include "etnaviv_mmu.h"
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static void etnaviv_domain_unmap(struct etnaviv_iommu_domain *domain,
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unsigned long iova, size_t size)
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{
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size_t unmapped_page, unmapped = 0;
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size_t pgsize = SZ_4K;
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if (!IS_ALIGNED(iova | size, pgsize)) {
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pr_err("unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%zx\n",
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iova, size, pgsize);
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return;
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}
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while (unmapped < size) {
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unmapped_page = domain->ops->unmap(domain, iova, pgsize);
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if (!unmapped_page)
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break;
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iova += unmapped_page;
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unmapped += unmapped_page;
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}
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}
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static int etnaviv_domain_map(struct etnaviv_iommu_domain *domain,
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unsigned long iova, phys_addr_t paddr,
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size_t size, int prot)
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{
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unsigned long orig_iova = iova;
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size_t pgsize = SZ_4K;
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size_t orig_size = size;
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int ret = 0;
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if (!IS_ALIGNED(iova | paddr | size, pgsize)) {
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pr_err("unaligned: iova 0x%lx pa %pa size 0x%zx min_pagesz 0x%zx\n",
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iova, &paddr, size, pgsize);
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return -EINVAL;
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}
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while (size) {
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ret = domain->ops->map(domain, iova, paddr, pgsize, prot);
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if (ret)
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break;
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iova += pgsize;
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paddr += pgsize;
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size -= pgsize;
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}
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/* unroll mapping in case something went wrong */
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if (ret)
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etnaviv_domain_unmap(domain, orig_iova, orig_size - size);
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return ret;
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}
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static int etnaviv_iommu_map(struct etnaviv_iommu *iommu, u32 iova,
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struct sg_table *sgt, unsigned len, int prot)
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{
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struct etnaviv_iommu_domain *domain = iommu->domain;
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struct scatterlist *sg;
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unsigned int da = iova;
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unsigned int i, j;
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int ret;
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if (!domain || !sgt)
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return -EINVAL;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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u32 pa = sg_dma_address(sg) - sg->offset;
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size_t bytes = sg_dma_len(sg) + sg->offset;
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VERB("map[%d]: %08x %08x(%zx)", i, iova, pa, bytes);
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ret = etnaviv_domain_map(domain, da, pa, bytes, prot);
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if (ret)
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goto fail;
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da += bytes;
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}
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return 0;
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fail:
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da = iova;
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for_each_sg(sgt->sgl, sg, i, j) {
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size_t bytes = sg_dma_len(sg) + sg->offset;
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etnaviv_domain_unmap(domain, da, bytes);
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da += bytes;
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}
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return ret;
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}
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static void etnaviv_iommu_unmap(struct etnaviv_iommu *iommu, u32 iova,
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struct sg_table *sgt, unsigned len)
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{
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struct etnaviv_iommu_domain *domain = iommu->domain;
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struct scatterlist *sg;
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unsigned int da = iova;
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int i;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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size_t bytes = sg_dma_len(sg) + sg->offset;
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etnaviv_domain_unmap(domain, da, bytes);
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VERB("unmap[%d]: %08x(%zx)", i, iova, bytes);
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BUG_ON(!PAGE_ALIGNED(bytes));
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da += bytes;
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}
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}
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static void etnaviv_iommu_remove_mapping(struct etnaviv_iommu *mmu,
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struct etnaviv_vram_mapping *mapping)
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{
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struct etnaviv_gem_object *etnaviv_obj = mapping->object;
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etnaviv_iommu_unmap(mmu, mapping->vram_node.start,
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etnaviv_obj->sgt, etnaviv_obj->base.size);
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drm_mm_remove_node(&mapping->vram_node);
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}
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static int etnaviv_iommu_find_iova(struct etnaviv_iommu *mmu,
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struct drm_mm_node *node, size_t size)
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{
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struct etnaviv_vram_mapping *free = NULL;
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enum drm_mm_insert_mode mode = DRM_MM_INSERT_LOW;
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int ret;
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lockdep_assert_held(&mmu->lock);
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while (1) {
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struct etnaviv_vram_mapping *m, *n;
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struct drm_mm_scan scan;
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struct list_head list;
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bool found;
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ret = drm_mm_insert_node_in_range(&mmu->mm, node,
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size, 0, 0, 0, U64_MAX, mode);
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if (ret != -ENOSPC)
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break;
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/* Try to retire some entries */
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drm_mm_scan_init(&scan, &mmu->mm, size, 0, 0, mode);
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found = 0;
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INIT_LIST_HEAD(&list);
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list_for_each_entry(free, &mmu->mappings, mmu_node) {
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/* If this vram node has not been used, skip this. */
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if (!free->vram_node.mm)
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continue;
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/*
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* If the iova is pinned, then it's in-use,
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* so we must keep its mapping.
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*/
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if (free->use)
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continue;
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list_add(&free->scan_node, &list);
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if (drm_mm_scan_add_block(&scan, &free->vram_node)) {
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found = true;
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break;
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}
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}
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if (!found) {
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/* Nothing found, clean up and fail */
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list_for_each_entry_safe(m, n, &list, scan_node)
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BUG_ON(drm_mm_scan_remove_block(&scan, &m->vram_node));
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break;
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}
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/*
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* drm_mm does not allow any other operations while
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* scanning, so we have to remove all blocks first.
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* If drm_mm_scan_remove_block() returns false, we
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* can leave the block pinned.
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*/
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list_for_each_entry_safe(m, n, &list, scan_node)
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if (!drm_mm_scan_remove_block(&scan, &m->vram_node))
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list_del_init(&m->scan_node);
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/*
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* Unmap the blocks which need to be reaped from the MMU.
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* Clear the mmu pointer to prevent the mapping_get finding
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* this mapping.
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*/
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list_for_each_entry_safe(m, n, &list, scan_node) {
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etnaviv_iommu_remove_mapping(mmu, m);
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m->mmu = NULL;
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list_del_init(&m->mmu_node);
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list_del_init(&m->scan_node);
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}
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mode = DRM_MM_INSERT_EVICT;
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/*
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* We removed enough mappings so that the new allocation will
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* succeed, retry the allocation one more time.
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*/
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}
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return ret;
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}
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int etnaviv_iommu_map_gem(struct etnaviv_iommu *mmu,
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struct etnaviv_gem_object *etnaviv_obj, u32 memory_base,
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struct etnaviv_vram_mapping *mapping)
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{
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struct sg_table *sgt = etnaviv_obj->sgt;
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struct drm_mm_node *node;
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int ret;
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lockdep_assert_held(&etnaviv_obj->lock);
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mutex_lock(&mmu->lock);
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/* v1 MMU can optimize single entry (contiguous) scatterlists */
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if (mmu->version == ETNAVIV_IOMMU_V1 &&
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sgt->nents == 1 && !(etnaviv_obj->flags & ETNA_BO_FORCE_MMU)) {
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u32 iova;
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iova = sg_dma_address(sgt->sgl) - memory_base;
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if (iova < 0x80000000 - sg_dma_len(sgt->sgl)) {
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mapping->iova = iova;
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list_add_tail(&mapping->mmu_node, &mmu->mappings);
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ret = 0;
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goto unlock;
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}
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}
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node = &mapping->vram_node;
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ret = etnaviv_iommu_find_iova(mmu, node, etnaviv_obj->base.size);
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if (ret < 0)
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goto unlock;
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mapping->iova = node->start;
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ret = etnaviv_iommu_map(mmu, node->start, sgt, etnaviv_obj->base.size,
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ETNAVIV_PROT_READ | ETNAVIV_PROT_WRITE);
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if (ret < 0) {
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drm_mm_remove_node(node);
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goto unlock;
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}
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list_add_tail(&mapping->mmu_node, &mmu->mappings);
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mmu->need_flush = true;
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unlock:
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mutex_unlock(&mmu->lock);
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return ret;
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}
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void etnaviv_iommu_unmap_gem(struct etnaviv_iommu *mmu,
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struct etnaviv_vram_mapping *mapping)
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{
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WARN_ON(mapping->use);
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mutex_lock(&mmu->lock);
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/* If the vram node is on the mm, unmap and remove the node */
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if (mapping->vram_node.mm == &mmu->mm)
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etnaviv_iommu_remove_mapping(mmu, mapping);
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list_del(&mapping->mmu_node);
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mmu->need_flush = true;
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mutex_unlock(&mmu->lock);
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}
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void etnaviv_iommu_destroy(struct etnaviv_iommu *mmu)
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{
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drm_mm_takedown(&mmu->mm);
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mmu->domain->ops->free(mmu->domain);
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kfree(mmu);
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}
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struct etnaviv_iommu *etnaviv_iommu_new(struct etnaviv_gpu *gpu)
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{
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enum etnaviv_iommu_version version;
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struct etnaviv_iommu *mmu;
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mmu = kzalloc(sizeof(*mmu), GFP_KERNEL);
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if (!mmu)
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return ERR_PTR(-ENOMEM);
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if (!(gpu->identity.minor_features1 & chipMinorFeatures1_MMU_VERSION)) {
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mmu->domain = etnaviv_iommuv1_domain_alloc(gpu);
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version = ETNAVIV_IOMMU_V1;
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} else {
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mmu->domain = etnaviv_iommuv2_domain_alloc(gpu);
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version = ETNAVIV_IOMMU_V2;
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}
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if (!mmu->domain) {
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dev_err(gpu->dev, "Failed to allocate GPU IOMMU domain\n");
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kfree(mmu);
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return ERR_PTR(-ENOMEM);
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}
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mmu->gpu = gpu;
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mmu->version = version;
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mutex_init(&mmu->lock);
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INIT_LIST_HEAD(&mmu->mappings);
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drm_mm_init(&mmu->mm, mmu->domain->base, mmu->domain->size);
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return mmu;
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}
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void etnaviv_iommu_restore(struct etnaviv_gpu *gpu)
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{
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if (gpu->mmu->version == ETNAVIV_IOMMU_V1)
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etnaviv_iommuv1_restore(gpu);
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else
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etnaviv_iommuv2_restore(gpu);
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}
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int etnaviv_iommu_get_suballoc_va(struct etnaviv_gpu *gpu, dma_addr_t paddr,
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struct drm_mm_node *vram_node, size_t size,
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u32 *iova)
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{
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struct etnaviv_iommu *mmu = gpu->mmu;
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if (mmu->version == ETNAVIV_IOMMU_V1) {
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*iova = paddr - gpu->memory_base;
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return 0;
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} else {
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int ret;
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mutex_lock(&mmu->lock);
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ret = etnaviv_iommu_find_iova(mmu, vram_node, size);
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if (ret < 0) {
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mutex_unlock(&mmu->lock);
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return ret;
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}
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ret = etnaviv_domain_map(mmu->domain, vram_node->start, paddr,
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size, ETNAVIV_PROT_READ);
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if (ret < 0) {
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drm_mm_remove_node(vram_node);
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mutex_unlock(&mmu->lock);
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return ret;
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}
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gpu->mmu->need_flush = true;
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mutex_unlock(&mmu->lock);
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*iova = (u32)vram_node->start;
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return 0;
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}
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}
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void etnaviv_iommu_put_suballoc_va(struct etnaviv_gpu *gpu,
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struct drm_mm_node *vram_node, size_t size,
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u32 iova)
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{
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struct etnaviv_iommu *mmu = gpu->mmu;
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if (mmu->version == ETNAVIV_IOMMU_V2) {
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mutex_lock(&mmu->lock);
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etnaviv_domain_unmap(mmu->domain, iova, size);
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drm_mm_remove_node(vram_node);
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mutex_unlock(&mmu->lock);
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}
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}
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size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu)
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{
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return iommu->domain->ops->dump_size(iommu->domain);
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}
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void etnaviv_iommu_dump(struct etnaviv_iommu *iommu, void *buf)
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{
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iommu->domain->ops->dump(iommu->domain, buf);
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}
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