Sergei Shtylyov a6318d57f6 sh_eth: add sh_eth_cpu_data::gecmr flag ... Not all Ether controllers having the Gigabit register layout have GECMR -- RZ/A1 (AKA R7S72100) actually has the same layout but no Gigabit speed support and hence no GECMR. In the past, the new register map table was added for this SoC, now I think we should have used the existing Gigabit table with the differences (such as GECMR) covered by the mere flags in the 'struct sh_eth_cpu_data'. Add such flag for GECMR -- and then we can get rid of the R7S72100 specific layout in the next patch... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2020-02-16 19:44:41 -08:00
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Kconfig	ethernet: renesas: convert to SPDX identifiers	2018-09-10 10:11:53 -07:00
Makefile	ethernet: renesas: convert to SPDX identifiers	2018-09-10 10:11:53 -07:00
ravb_main.c	netdev: pass the stuck queue to the timeout handler	2019-12-12 21:38:57 -08:00
ravb_ptp.c	ptp: Introduce strict checking of external time stamp options.	2019-11-15 12:48:32 -08:00
ravb.h	ravb: implement MTU change while device is up	2019-11-14 18:05:25 -08:00
sh_eth.c	sh_eth: add sh_eth_cpu_data::gecmr flag	2020-02-16 19:44:41 -08:00
sh_eth.h	sh_eth: add sh_eth_cpu_data::gecmr flag	2020-02-16 19:44:41 -08:00