hersen wu b37727fb14 drm/amd/display: Add vupdate interrupt sources to NV10 ... [WHY] linux upstream already has interrupt vupdate for freesync in dcn10. dcn20 interrupt shares the same source code as dcn10. but dcn20 interrupt translator does not add vupdate interrupt. this cause index of vupdate aarray be negative which causes crash. [HOW] add vupdate into dc interrupt transltor Signed-off-by: hersen wu <hersenxs.wu@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-06-22 09:34:10 -05:00
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dce80	drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)	2019-04-03 10:00:33 -05:00
dce110	drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)	2019-04-03 10:00:33 -05:00
dce120	drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)	2019-04-03 10:00:33 -05:00
dcn10	drm/amd/display: move dcn v1_0 irq source header to ivsrcid/dcn/	2019-06-20 21:35:30 -05:00
dcn20	drm/amd/display: Add vupdate interrupt sources to NV10	2019-06-22 09:34:10 -05:00
irq_service.c	Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"	2018-08-21 14:32:28 -05:00
irq_service.h	amdgpu/dc: fix construct return values on irq service.	2017-09-29 13:02:54 -04:00
Makefile	drm/amd/display: Add DCN2 IRQ handling	2019-06-21 18:59:34 -05:00