mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
bb42a8bf2e
1. Replace boiler plate licenses texts with the SPDX license
identifiers in Toradex iMX6-based SoM device trees.
2. As X11 is identical to the MIT License, but with an extra sentence
that prohibits using the copyright holders' names for advertising or
promotional purposes without written permission, use MIT license instead
of X11 ('s/X11/MIT/g').
3. Replace "Toradex AG" with "Toradex" in the Copyright notice.
4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all
new DTS files from Toradex.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
856 lines
20 KiB
Plaintext
856 lines
20 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright 2014-2020 Toradex
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Toradex Colibri iMX6DL/S Module";
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compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
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backlight: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_bl_on>;
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pwms = <&pwm3 0 5000000>;
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enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
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status = "disabled";
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};
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reg_module_3v3: regulator-module-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "+V3.3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_module_3v3_audio: regulator-module-3v3-audio {
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compatible = "regulator-fixed";
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regulator-name = "+V3.3_AUDIO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_host_vbus: regulator-usb-host-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
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regulator-name = "usb_host_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
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status = "disabled";
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};
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sound {
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compatible = "fsl,imx-audio-sgtl5000";
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model = "imx6dl-colibri-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"Headphone Jack", "HP_OUT",
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"LINE_IN", "Line In Jack",
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias";
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mux-int-port = <1>;
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mux-ext-port = <5>;
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};
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/* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */
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sound_spdif: sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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spdif-controller = <&spdif>;
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spdif-in;
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spdif-out;
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status = "disabled";
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux &pinctrl_mic_gnd>;
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status = "okay";
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};
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/* Optional on SODIMM 55/63 */
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "disabled";
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};
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/* Optional on SODIMM 178/188 */
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "disabled";
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};
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/* Colibri SSP */
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&ecspi4 {
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cs-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi4>;
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status = "disabled";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rmii";
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phy-handle = <ðphy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy: ethernet-phy@0 {
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reg = <0>;
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micrel,led-mode = <0>;
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};
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};
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};
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&hdmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi_ddc>;
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status = "disabled";
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};
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/*
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* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
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* touch screen controller
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*/
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-0 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pmic: pfuze100@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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/* vgen1: unused */
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vgen3: unused */
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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codec: sgtl5000@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_module_3v3_audio>;
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VDDIO-supply = <®_module_3v3>;
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VDDD-supply = <&vgen4_reg>;
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lrclk-strength = <3>;
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};
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/* STMPE811 touch screen controller */
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stmpe811@41 {
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compatible = "st,stmpe811";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_touch_int>;
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reg = <0x41>;
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interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio6>;
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interrupt-controller;
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id = <0>;
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blocks = <0x5>;
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irq-trigger = <0x1>;
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/* 3.25 MHz ADC clock speed */
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st,adc-freq = <1>;
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/* 12-bit ADC */
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st,mod-12b = <1>;
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/* internal ADC reference */
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st,ref-sel = <0>;
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/* ADC converstion time: 80 clocks */
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st,sample-time = <4>;
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stmpe_touchscreen {
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compatible = "st,stmpe-ts";
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/* 8 sample average control */
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st,ave-ctrl = <3>;
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/* 7 length fractional part in z */
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st,fraction-z = <7>;
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/*
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* 50 mA typical 80 mA max touchscreen drivers
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* current limit value
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*/
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st,i-drive = <1>;
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/* 1 ms panel driver settling time */
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st,settling = <3>;
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/* 5 ms touch detect interrupt delay */
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st,touch-det-delay = <5>;
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};
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stmpe_adc {
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compatible = "st,stmpe-adc";
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/* forbid to use ADC channels 3-0 (touch) */
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st,norequest-mask = <0x0F>;
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};
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};
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};
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/*
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* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
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*/
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c3>;
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pinctrl-1 = <&pinctrl_i2c3_gpio>;
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scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "disabled";
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};
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/* Colibri PWM<B> */
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "disabled";
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};
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/* Colibri PWM<D> */
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "disabled";
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};
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/* Colibri PWM<A> */
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "disabled";
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};
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/* Colibri PWM<C> */
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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status = "disabled";
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};
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/* Optional S/PDIF out on SODIMM 137 */
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&spdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif>;
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status = "disabled";
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};
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&ssi1 {
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status = "okay";
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};
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/* Colibri UART_A */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
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fsl,dte-mode;
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uart-has-rtscts;
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status = "disabled";
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};
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/* Colibri UART_B */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_dte>;
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fsl,dte-mode;
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uart-has-rtscts;
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status = "disabled";
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};
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/* Colibri UART_C */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_dte>;
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fsl,dte-mode;
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status = "disabled";
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};
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&usbotg {
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pinctrl-names = "default";
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disable-over-current;
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dr_mode = "peripheral";
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status = "disabled";
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};
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/* Colibri MMC */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
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cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
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disable-wp;
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vqmmc-supply = <®_module_3v3>;
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bus-width = <4>;
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no-1-8-v;
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status = "disabled";
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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vqmmc-supply = <®_module_3v3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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status = "okay";
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};
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&weim {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_weim_sram &pinctrl_weim_cs0
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&pinctrl_weim_cs1 &pinctrl_weim_cs2
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&pinctrl_weim_rdnwr &pinctrl_weim_npwe>;
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#address-cells = <2>;
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#size-cells = <1>;
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status = "disabled";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh_oc_1>;
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
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MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
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MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
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MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0
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/* SGTL5000 sys_mclk */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
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>;
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};
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pinctrl_cam_mclk: cammclkgrp {
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fsl,pins = <
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/* Parallel Camera CAM sys_mclk */
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MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0
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>;
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};
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pinctrl_ecspi4: ecspi4grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
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MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
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MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
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/* SPI CS */
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_gpio_bl_on: gpioblon {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
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>;
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};
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pinctrl_gpio_keys: gpiokeys {
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fsl,pins = <
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MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
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>;
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};
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pinctrl_hdmi_ddc: hdmiddcgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2_gpio: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_ipu1_csi0: ipu1csi0grp { /* Parallel Camera */
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0xb0b1
|
|
MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13 0xb0b1
|
|
MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14 0xb0b1
|
|
MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15 0xb0b1
|
|
MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16 0xb0b1
|
|
MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17 0xb0b1
|
|
MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18 0xb0b1
|
|
MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19 0xb0b1
|
|
MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK 0xb0b1
|
|
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1
|
|
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1
|
|
/* Disable PWM pins on camera interface */
|
|
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
|
|
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40
|
|
>;
|
|
};
|
|
|
|
pinctrl_ipu1_lcdif: ipu1lcdifgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1
|
|
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xa1
|
|
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xa1
|
|
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xa1
|
|
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xa1
|
|
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xa1
|
|
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xa1
|
|
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xa1
|
|
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xa1
|
|
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xa1
|
|
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xa1
|
|
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xa1
|
|
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xa1
|
|
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xa1
|
|
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xa1
|
|
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xa1
|
|
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xa1
|
|
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xa1
|
|
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xa1
|
|
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xa1
|
|
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xa1
|
|
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xa1
|
|
>;
|
|
};
|
|
|
|
pinctrl_mic_gnd: gpiomicgnd {
|
|
fsl,pins = <
|
|
/* Controls Mic GND, PU or '1' pull Mic GND to GND */
|
|
MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_mmc_cd: gpiommccd {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm2: pwm2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
|
|
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
|
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm4: pwm4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
|
|
fsl,pins = <
|
|
/* USBH_EN */
|
|
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh_oc_1: usbhoc1grp {
|
|
fsl,pins = <
|
|
/* USBH_OC */
|
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_spdif: spdifgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_touch_int: gpiotouchintgrp {
|
|
fsl,pins = <
|
|
/* STMPE811 interrupt */
|
|
MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1_dce: uart1dcegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
/* DTE mode */
|
|
pinctrl_uart1_dte: uart1dtegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
/* Additional DTR, DSR, DCD */
|
|
pinctrl_uart1_ctrl: uart1ctrlgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
|
|
MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
|
|
MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2_dte: uart2dtegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
|
|
MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3_dte: uart3dtegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbc_det: usbcdetgrp {
|
|
fsl,pins = <
|
|
/* USBC_DET */
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
|
/* USBC_DET_EN */
|
|
MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
|
|
/* USBC_DET_OVERWRITE */
|
|
MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbc_id_1: usbc_id-1 {
|
|
fsl,pins = <
|
|
/* USBC_ID */
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
|
|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
|
|
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
|
|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
|
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
|
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
|
/* eMMC reset */
|
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_cs0: weimcs0grp {
|
|
fsl,pins = <
|
|
/* nEXT_CS0 */
|
|
MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_cs1: weimcs1grp {
|
|
fsl,pins = <
|
|
/* nEXT_CS1 */
|
|
MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_cs2: weimcs2grp {
|
|
fsl,pins = <
|
|
/* nEXT_CS2 */
|
|
MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_sram: weimsramgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
|
|
MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
|
|
/* Data */
|
|
MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
|
|
MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
|
|
/* Address */
|
|
MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
|
|
MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
|
|
MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
|
|
MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
|
|
MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
|
|
MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
|
|
MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
|
|
MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
|
|
MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
|
|
MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
|
|
MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
|
|
MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
|
|
MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
|
|
MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
|
|
MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
|
|
MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_rdnwr: weimrdnwr {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
|
|
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_weim_npwe: weimnpwe {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
|
|
MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
|
|
>;
|
|
};
|
|
|
|
/* ADDRESS[16:18] [25] used as GPIO */
|
|
pinctrl_weim_gpio_1: weimgpio-1 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
|
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
|
|
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* ADDRESS[19:24] used as GPIO */
|
|
pinctrl_weim_gpio_2: weimgpio-2 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
|
|
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
|
|
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* DATA[16:31] used as GPIO */
|
|
pinctrl_weim_gpio_3: weimgpio-3 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
|
|
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
|
|
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
|
|
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
|
|
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
|
|
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
|
|
MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
|
|
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
|
|
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
|
|
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
|
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
|
|
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
|
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* DQM[0:3] used as GPIO */
|
|
pinctrl_weim_gpio_4: weimgpio-4 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0
|
|
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0
|
|
MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* RDY used as GPIO */
|
|
pinctrl_weim_gpio_5: weimgpio-5 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* ADDRESS[16] DATA[30] used as GPIO */
|
|
pinctrl_weim_gpio_6: weimgpio-6 {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
|
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
|
|
>;
|
|
};
|
|
};
|