mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
184 lines
4.4 KiB
C
184 lines
4.4 KiB
C
/*
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* This file contains the routines for TLB flushing.
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* On machines where the MMU uses a hash table to store virtual to
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* physical translations, these routines flush entries from the
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* hash table also.
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* -- paulus
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/highmem.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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#include "mmu_decl.h"
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/*
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* Called when unmapping pages to flush entries from the TLB/hash table.
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*/
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void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
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{
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unsigned long ptephys;
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if (Hash != 0) {
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ptephys = __pa(ptep) & PAGE_MASK;
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flush_hash_pages(mm->context, addr, ptephys, 1);
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}
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}
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/*
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* Called by ptep_set_access_flags, must flush on CPUs for which the
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* DSI handler can't just "fixup" the TLB on a write fault
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*/
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void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
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{
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if (Hash != 0)
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return;
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_tlbie(addr);
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}
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/*
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* Called at the end of a mmu_gather operation to make sure the
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* TLB flush is completely done.
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*/
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void tlb_flush(struct mmu_gather *tlb)
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{
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if (Hash == 0) {
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/*
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* 603 needs to flush the whole TLB here since
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* it doesn't use a hash table.
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*/
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_tlbia();
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}
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}
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/*
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* TLB flushing:
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*
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_range(vma, start, end) flushes a range of pages
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* - flush_tlb_kernel_range(start, end) flushes kernel pages
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*
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* since the hardware hash table functions as an extension of the
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* tlb as far as the linux tables are concerned, flush it too.
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* -- Cort
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*/
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/*
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* 750 SMP is a Bad Idea because the 750 doesn't broadcast all
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* the cache operations on the bus. Hence we need to use an IPI
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* to get the other CPU(s) to invalidate their TLBs.
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*/
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#ifdef CONFIG_SMP_750
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#define FINISH_FLUSH smp_send_tlb_invalidate(0)
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#else
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#define FINISH_FLUSH do { } while (0)
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#endif
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static void flush_range(struct mm_struct *mm, unsigned long start,
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unsigned long end)
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{
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pmd_t *pmd;
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unsigned long pmd_end;
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int count;
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unsigned int ctx = mm->context;
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if (Hash == 0) {
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_tlbia();
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return;
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}
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start &= PAGE_MASK;
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if (start >= end)
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return;
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end = (end - 1) | ~PAGE_MASK;
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pmd = pmd_offset(pgd_offset(mm, start), start);
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for (;;) {
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pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
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if (pmd_end > end)
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pmd_end = end;
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if (!pmd_none(*pmd)) {
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count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
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flush_hash_pages(ctx, start, pmd_val(*pmd), count);
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}
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if (pmd_end == end)
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break;
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start = pmd_end + 1;
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++pmd;
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}
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}
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/*
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* Flush kernel TLB entries in the given range
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*/
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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flush_range(&init_mm, start, end);
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FINISH_FLUSH;
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}
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/*
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* Flush all the (user) entries for the address space described by mm.
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*/
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void flush_tlb_mm(struct mm_struct *mm)
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{
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struct vm_area_struct *mp;
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if (Hash == 0) {
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_tlbia();
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return;
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}
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for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
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flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
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FINISH_FLUSH;
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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struct mm_struct *mm;
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pmd_t *pmd;
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if (Hash == 0) {
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_tlbie(vmaddr);
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return;
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}
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mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
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pmd = pmd_offset(pgd_offset(mm, vmaddr), vmaddr);
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if (!pmd_none(*pmd))
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flush_hash_pages(mm->context, vmaddr, pmd_val(*pmd), 1);
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FINISH_FLUSH;
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}
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/*
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* For each address in the range, find the pte for the address
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* and check _PAGE_HASHPTE bit; if it is set, find and destroy
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* the corresponding HPTE.
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*/
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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flush_range(vma->vm_mm, start, end);
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FINISH_FLUSH;
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}
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