mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 14:33:30 +07:00
08529078d8
Prerequisite for fixing the current problem of instantaneous reboots when a
5-level paging kernel is booted on 4-level paging hardware.
At the same time this change prepares the decompression code to boot-time
switching between 4- and 5-level paging.
[ tglx: Folded the GCC < 5 fix. ]
Fixes: 77ef56e4f0 ("x86: Enable 5-level paging support via CONFIG_X86_5LEVEL=y")
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: stable@vger.kernel.org
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: linux-mm@kvack.org
Cc: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lkml.kernel.org/r/20171204124059.63515-2-kirill.shutemov@linux.intel.com
592 lines
12 KiB
ArmAsm
592 lines
12 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* linux/boot/head.S
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*
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* Copyright (C) 1991, 1992, 1993 Linus Torvalds
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*/
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/*
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* head.S contains the 32-bit startup code.
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*
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* NOTE!!! Startup happens at absolute address 0x00001000, which is also where
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* the page directory will exist. The startup code will be overwritten by
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* the page directory. [According to comments etc elsewhere on a compressed
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* kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
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*
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* Page 0 is deliberately kept safe, since System Management Mode code in
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* laptops may need to access the BIOS data stored there. This is also
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* useful for future device drivers that either access the BIOS via VM86
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* mode.
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*/
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/*
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* High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
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*/
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.code32
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.text
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/boot.h>
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#include <asm/msr.h>
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#include <asm/processor-flags.h>
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#include <asm/asm-offsets.h>
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#include <asm/bootparam.h>
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/*
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* Locally defined symbols should be marked hidden:
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*/
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.hidden _bss
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.hidden _ebss
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.hidden _got
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.hidden _egot
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__HEAD
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.code32
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ENTRY(startup_32)
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/*
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* 32bit entry is 0 and it is ABI so immutable!
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* If we come here directly from a bootloader,
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* kernel(text+data+bss+brk) ramdisk, zero_page, command line
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* all need to be under the 4G limit.
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*/
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cld
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/*
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* Test KEEP_SEGMENTS flag to see if the bootloader is asking
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* us to not reload segments
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*/
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testb $KEEP_SEGMENTS, BP_loadflags(%esi)
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jnz 1f
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cli
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movl $(__BOOT_DS), %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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1:
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/*
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* Calculate the delta between where we were compiled to run
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* at and where we were actually loaded at. This can only be done
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* with a short local call on x86. Nothing else will tell us what
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* address we are running at. The reserved chunk of the real-mode
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* data at 0x1e4 (defined as a scratch field) are used as the stack
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* for this calculation. Only 4 bytes are needed.
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*/
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leal (BP_scratch+4)(%esi), %esp
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call 1f
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1: popl %ebp
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subl $1b, %ebp
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/* setup a stack and make sure cpu supports long mode. */
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movl $boot_stack_end, %eax
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addl %ebp, %eax
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movl %eax, %esp
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call verify_cpu
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testl %eax, %eax
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jnz no_longmode
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/*
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* Compute the delta between where we were compiled to run at
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* and where the code will actually run at.
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*
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* %ebp contains the address we are loaded at by the boot loader and %ebx
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* contains the address where we should move the kernel image temporarily
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* for safe in-place decompression.
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*/
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#ifdef CONFIG_RELOCATABLE
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movl %ebp, %ebx
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movl BP_kernel_alignment(%esi), %eax
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decl %eax
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addl %eax, %ebx
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notl %eax
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andl %eax, %ebx
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cmpl $LOAD_PHYSICAL_ADDR, %ebx
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jge 1f
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#endif
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movl $LOAD_PHYSICAL_ADDR, %ebx
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1:
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/* Target address to relocate to for decompression */
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movl BP_init_size(%esi), %eax
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subl $_end, %eax
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addl %eax, %ebx
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/*
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* Prepare for entering 64 bit mode
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*/
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/* Load new GDT with the 64bit segments using 32bit descriptor */
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addl %ebp, gdt+2(%ebp)
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lgdt gdt(%ebp)
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/* Enable PAE mode */
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movl %cr4, %eax
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orl $X86_CR4_PAE, %eax
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movl %eax, %cr4
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/*
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* Build early 4G boot pagetable
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*/
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/*
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* If SEV is active then set the encryption mask in the page tables.
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* This will insure that when the kernel is copied and decompressed
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* it will be done so encrypted.
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*/
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call get_sev_encryption_bit
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xorl %edx, %edx
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testl %eax, %eax
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jz 1f
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subl $32, %eax /* Encryption bit is always above bit 31 */
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bts %eax, %edx /* Set encryption mask for page tables */
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1:
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/* Initialize Page tables to 0 */
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leal pgtable(%ebx), %edi
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xorl %eax, %eax
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movl $(BOOT_INIT_PGT_SIZE/4), %ecx
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rep stosl
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/* Build Level 4 */
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leal pgtable + 0(%ebx), %edi
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leal 0x1007 (%edi), %eax
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movl %eax, 0(%edi)
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addl %edx, 4(%edi)
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/* Build Level 3 */
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leal pgtable + 0x1000(%ebx), %edi
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leal 0x1007(%edi), %eax
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movl $4, %ecx
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1: movl %eax, 0x00(%edi)
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addl %edx, 0x04(%edi)
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addl $0x00001000, %eax
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addl $8, %edi
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decl %ecx
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jnz 1b
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/* Build Level 2 */
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leal pgtable + 0x2000(%ebx), %edi
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movl $0x00000183, %eax
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movl $2048, %ecx
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1: movl %eax, 0(%edi)
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addl %edx, 4(%edi)
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addl $0x00200000, %eax
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addl $8, %edi
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decl %ecx
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jnz 1b
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/* Enable the boot page tables */
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leal pgtable(%ebx), %eax
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movl %eax, %cr3
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/* Enable Long mode in EFER (Extended Feature Enable Register) */
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movl $MSR_EFER, %ecx
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rdmsr
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btsl $_EFER_LME, %eax
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wrmsr
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/* After gdt is loaded */
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xorl %eax, %eax
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lldt %ax
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movl $__BOOT_TSS, %eax
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ltr %ax
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/*
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* Setup for the jump to 64bit mode
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*
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* When the jump is performend we will be in long mode but
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* in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
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* (and in turn EFER.LMA = 1). To jump into 64bit mode we use
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* the new gdt/idt that has __KERNEL_CS with CS.L = 1.
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* We place all of the values on our mini stack so lret can
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* used to perform that far jump.
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*/
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pushl $__KERNEL_CS
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leal startup_64(%ebp), %eax
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#ifdef CONFIG_EFI_MIXED
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movl efi32_config(%ebp), %ebx
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cmp $0, %ebx
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jz 1f
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leal handover_entry(%ebp), %eax
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1:
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#endif
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pushl %eax
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/* Enter paged protected Mode, activating Long Mode */
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movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
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movl %eax, %cr0
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/* Jump from 32bit compatibility mode into 64bit mode. */
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lret
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ENDPROC(startup_32)
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#ifdef CONFIG_EFI_MIXED
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.org 0x190
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ENTRY(efi32_stub_entry)
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add $0x4, %esp /* Discard return address */
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popl %ecx
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popl %edx
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popl %esi
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leal (BP_scratch+4)(%esi), %esp
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call 1f
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1: pop %ebp
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subl $1b, %ebp
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movl %ecx, efi32_config(%ebp)
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movl %edx, efi32_config+8(%ebp)
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sgdtl efi32_boot_gdt(%ebp)
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leal efi32_config(%ebp), %eax
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movl %eax, efi_config(%ebp)
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jmp startup_32
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ENDPROC(efi32_stub_entry)
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#endif
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.code64
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.org 0x200
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ENTRY(startup_64)
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/*
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* 64bit entry is 0x200 and it is ABI so immutable!
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* We come here either from startup_32 or directly from a
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* 64bit bootloader.
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* If we come here from a bootloader, kernel(text+data+bss+brk),
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* ramdisk, zero_page, command line could be above 4G.
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* We depend on an identity mapped page table being provided
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* that maps our entire kernel(text+data+bss+brk), zero page
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* and command line.
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*/
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/* Setup data segments. */
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xorl %eax, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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movl %eax, %fs
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movl %eax, %gs
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/*
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* Compute the decompressed kernel start address. It is where
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* we were loaded at aligned to a 2M boundary. %rbp contains the
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* decompressed kernel start address.
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*
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* If it is a relocatable kernel then decompress and run the kernel
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* from load address aligned to 2MB addr, otherwise decompress and
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* run the kernel from LOAD_PHYSICAL_ADDR
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*
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* We cannot rely on the calculation done in 32-bit mode, since we
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* may have been invoked via the 64-bit entry point.
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*/
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/* Start with the delta to where the kernel will run at. */
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#ifdef CONFIG_RELOCATABLE
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leaq startup_32(%rip) /* - $startup_32 */, %rbp
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movl BP_kernel_alignment(%rsi), %eax
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decl %eax
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addq %rax, %rbp
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notq %rax
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andq %rax, %rbp
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cmpq $LOAD_PHYSICAL_ADDR, %rbp
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jge 1f
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#endif
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movq $LOAD_PHYSICAL_ADDR, %rbp
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1:
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/* Target address to relocate to for decompression */
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movl BP_init_size(%rsi), %ebx
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subl $_end, %ebx
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addq %rbp, %rbx
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/* Set up the stack */
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leaq boot_stack_end(%rbx), %rsp
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#ifdef CONFIG_X86_5LEVEL
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/*
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* Check if we need to enable 5-level paging.
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* RSI holds real mode data and need to be preserved across
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* a function call.
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*/
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pushq %rsi
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call l5_paging_required
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popq %rsi
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/* If l5_paging_required() returned zero, we're done here. */
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cmpq $0, %rax
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je lvl5
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/*
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* At this point we are in long mode with 4-level paging enabled,
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* but we want to enable 5-level paging.
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*
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* The problem is that we cannot do it directly. Setting LA57 in
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* long mode would trigger #GP. So we need to switch off long mode
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* first.
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*
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* NOTE: This is not going to work if bootloader put us above 4G
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* limit.
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*
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* The first step is go into compatibility mode.
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*/
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/* Clear additional page table */
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leaq lvl5_pgtable(%rbx), %rdi
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xorq %rax, %rax
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movq $(PAGE_SIZE/8), %rcx
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rep stosq
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/*
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* Setup current CR3 as the first and only entry in a new top level
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* page table.
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*/
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movq %cr3, %rdi
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leaq 0x7 (%rdi), %rax
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movq %rax, lvl5_pgtable(%rbx)
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/* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
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pushq $__KERNEL32_CS
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leaq compatible_mode(%rip), %rax
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pushq %rax
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lretq
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lvl5:
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#endif
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/* Zero EFLAGS */
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pushq $0
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popfq
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/*
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* Copy the compressed kernel to the end of our buffer
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* where decompression in place becomes safe.
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*/
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pushq %rsi
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leaq (_bss-8)(%rip), %rsi
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leaq (_bss-8)(%rbx), %rdi
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movq $_bss /* - $startup_32 */, %rcx
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shrq $3, %rcx
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std
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rep movsq
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cld
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popq %rsi
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/*
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* Jump to the relocated address.
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*/
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leaq relocated(%rbx), %rax
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jmp *%rax
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#ifdef CONFIG_EFI_STUB
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/* The entry point for the PE/COFF executable is efi_pe_entry. */
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ENTRY(efi_pe_entry)
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movq %rcx, efi64_config(%rip) /* Handle */
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movq %rdx, efi64_config+8(%rip) /* EFI System table pointer */
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leaq efi64_config(%rip), %rax
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movq %rax, efi_config(%rip)
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call 1f
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1: popq %rbp
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subq $1b, %rbp
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/*
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* Relocate efi_config->call().
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*/
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addq %rbp, efi64_config+40(%rip)
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movq %rax, %rdi
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call make_boot_params
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cmpq $0,%rax
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je fail
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mov %rax, %rsi
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leaq startup_32(%rip), %rax
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movl %eax, BP_code32_start(%rsi)
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jmp 2f /* Skip the relocation */
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handover_entry:
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call 1f
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1: popq %rbp
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subq $1b, %rbp
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/*
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* Relocate efi_config->call().
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*/
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movq efi_config(%rip), %rax
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addq %rbp, 40(%rax)
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2:
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movq efi_config(%rip), %rdi
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call efi_main
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movq %rax,%rsi
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cmpq $0,%rax
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jne 2f
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fail:
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/* EFI init failed, so hang. */
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hlt
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jmp fail
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2:
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movl BP_code32_start(%esi), %eax
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leaq startup_64(%rax), %rax
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jmp *%rax
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ENDPROC(efi_pe_entry)
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.org 0x390
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ENTRY(efi64_stub_entry)
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movq %rdi, efi64_config(%rip) /* Handle */
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movq %rsi, efi64_config+8(%rip) /* EFI System table pointer */
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leaq efi64_config(%rip), %rax
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movq %rax, efi_config(%rip)
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movq %rdx, %rsi
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jmp handover_entry
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ENDPROC(efi64_stub_entry)
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#endif
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.text
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relocated:
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/*
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* Clear BSS (stack is currently empty)
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*/
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xorl %eax, %eax
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leaq _bss(%rip), %rdi
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leaq _ebss(%rip), %rcx
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subq %rdi, %rcx
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shrq $3, %rcx
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rep stosq
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/*
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* Adjust our own GOT
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*/
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leaq _got(%rip), %rdx
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leaq _egot(%rip), %rcx
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1:
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cmpq %rcx, %rdx
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jae 2f
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addq %rbx, (%rdx)
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addq $8, %rdx
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jmp 1b
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2:
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/*
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* Do the extraction, and jump to the new kernel..
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*/
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pushq %rsi /* Save the real mode argument */
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movq %rsi, %rdi /* real mode address */
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leaq boot_heap(%rip), %rsi /* malloc area for uncompression */
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leaq input_data(%rip), %rdx /* input_data */
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movl $z_input_len, %ecx /* input_len */
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movq %rbp, %r8 /* output target address */
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movq $z_output_len, %r9 /* decompressed length, end of relocs */
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call extract_kernel /* returns kernel location in %rax */
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popq %rsi
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/*
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* Jump to the decompressed kernel.
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*/
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jmp *%rax
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.code32
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#ifdef CONFIG_X86_5LEVEL
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compatible_mode:
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/* Setup data and stack segments */
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movl $__KERNEL_DS, %eax
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movl %eax, %ds
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movl %eax, %ss
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/* Disable paging */
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movl %cr0, %eax
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btrl $X86_CR0_PG_BIT, %eax
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movl %eax, %cr0
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/* Point CR3 to 5-level paging */
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leal lvl5_pgtable(%ebx), %eax
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movl %eax, %cr3
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/* Enable PAE and LA57 mode */
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movl %cr4, %eax
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orl $(X86_CR4_PAE | X86_CR4_LA57), %eax
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movl %eax, %cr4
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/* Calculate address we are running at */
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call 1f
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1: popl %edi
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subl $1b, %edi
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/* Prepare stack for far return to Long Mode */
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pushl $__KERNEL_CS
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|
leal lvl5(%edi), %eax
|
|
push %eax
|
|
|
|
/* Enable paging back */
|
|
movl $(X86_CR0_PG | X86_CR0_PE), %eax
|
|
movl %eax, %cr0
|
|
|
|
lret
|
|
#endif
|
|
|
|
no_longmode:
|
|
/* This isn't an x86-64 CPU so hang */
|
|
1:
|
|
hlt
|
|
jmp 1b
|
|
|
|
#include "../../kernel/verify_cpu.S"
|
|
|
|
.data
|
|
gdt:
|
|
.word gdt_end - gdt
|
|
.long gdt
|
|
.word 0
|
|
.quad 0x00cf9a000000ffff /* __KERNEL32_CS */
|
|
.quad 0x00af9a000000ffff /* __KERNEL_CS */
|
|
.quad 0x00cf92000000ffff /* __KERNEL_DS */
|
|
.quad 0x0080890000000000 /* TS descriptor */
|
|
.quad 0x0000000000000000 /* TS continued */
|
|
gdt_end:
|
|
|
|
#ifdef CONFIG_EFI_STUB
|
|
efi_config:
|
|
.quad 0
|
|
|
|
#ifdef CONFIG_EFI_MIXED
|
|
.global efi32_config
|
|
efi32_config:
|
|
.fill 5,8,0
|
|
.quad efi64_thunk
|
|
.byte 0
|
|
#endif
|
|
|
|
.global efi64_config
|
|
efi64_config:
|
|
.fill 5,8,0
|
|
.quad efi_call
|
|
.byte 1
|
|
#endif /* CONFIG_EFI_STUB */
|
|
|
|
/*
|
|
* Stack and heap for uncompression
|
|
*/
|
|
.bss
|
|
.balign 4
|
|
boot_heap:
|
|
.fill BOOT_HEAP_SIZE, 1, 0
|
|
boot_stack:
|
|
.fill BOOT_STACK_SIZE, 1, 0
|
|
boot_stack_end:
|
|
|
|
/*
|
|
* Space for page tables (not in .bss so not zeroed)
|
|
*/
|
|
.section ".pgtable","a",@nobits
|
|
.balign 4096
|
|
pgtable:
|
|
.fill BOOT_PGT_SIZE, 1, 0
|
|
#ifdef CONFIG_X86_5LEVEL
|
|
lvl5_pgtable:
|
|
.fill PAGE_SIZE, 1, 0
|
|
#endif
|