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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a59d1637eb
Some BIOSes report very high frequency transition latency which are plainly wrong on CPus that can change frequency using native MSR interface. One such system is IBM T42 (2327-8ZU) as reported by Owen Taylor and Rik van Riel. cpufreq_ondemand driver uses this transition latency to come up with a reasonable sampling interval to sample CPU usage and with such high latency value, ondemand sampling interval ends up being very high (0.5 sec, in this particular case), resulting in performance impact due to slow response to increasing frequency. Fix it by capping-off the transition latency to 20uS for native MSR based frequency transitions. mjg: We've confirmed that this also helps on the X31 Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Len Brown <len.brown@intel.com> |
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| .. | ||
| acpi-cpufreq.c | ||
| cpufreq-nforce2.c | ||
| e_powersaver.c | ||
| elanfreq.c | ||
| gx-suspmod.c | ||
| Kconfig | ||
| longhaul.c | ||
| longhaul.h | ||
| longrun.c | ||
| Makefile | ||
| p4-clockmod.c | ||
| powernow-k6.c | ||
| powernow-k7.c | ||
| powernow-k7.h | ||
| powernow-k8.c | ||
| powernow-k8.h | ||
| sc520_freq.c | ||
| speedstep-centrino.c | ||
| speedstep-ich.c | ||
| speedstep-lib.c | ||
| speedstep-lib.h | ||
| speedstep-smi.c | ||