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a5956defe5
Update entry/exit latency and residency time of hikey960 to use more realistic figures based on unitary tests done on the platform. The complete results (in us) : big cluster cluster CPU max entry latency 800 400 max exit latency 2900 550 residency 903Mhz 5000 1500 residency 2363Mhz 0 1500 little cluster cluster CPU max entry latency 500 400 max exit latency 1600 650 residency 533Mhz 8000 4500 residency 1844Mhz 0 1500 We can see that the residency time depends of the running OPP which is not handled for now. Then we also have to take into account the constraint of a residency time shorter than the tick to get full advantage of idle loop reordering(tick is stopped if idle duration is higher than tick period). Finally the selected residency value are : big cluster cluster CPU residency 3700 1500 little cluster cluster CPU residency 3500 1500 A simple test with a task waking up every 11.111ms shows improvement: - 5% a lowest OPP - 22% at highest OPP The period has been chosen: - to be shorter than old cluster residency time and longer than new residency time of cluster off C-state - to prevent any sync with tick (4ms) when running tests that can add some variances between tests Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> |
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.. | ||
hi3660-hikey960.dts | ||
hi3660.dtsi | ||
hi3798cv200-poplar.dts | ||
hi3798cv200.dtsi | ||
hi6220-coresight.dtsi | ||
hi6220-hikey.dts | ||
hi6220.dtsi | ||
hikey960-pinctrl.dtsi | ||
hikey-pinctrl.dtsi | ||
hip05-d02.dts | ||
hip05.dtsi | ||
hip06-d03.dts | ||
hip06.dtsi | ||
hip07-d05.dts | ||
hip07.dtsi | ||
Makefile | ||
poplar-pinctrl.dtsi |