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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a58837f52d
Introduce 50G per lane FEC modes capability bit and newly supported fields in PPLM register which allow this configuration. Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> |
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accel.h | ||
cmd.h | ||
cq.h | ||
device.h | ||
doorbell.h | ||
driver.h | ||
eq.h | ||
eswitch.h | ||
fs_helpers.h | ||
fs.h | ||
mlx5_ifc_fpga.h | ||
mlx5_ifc.h | ||
port.h | ||
qp.h | ||
transobj.h | ||
vport.h |