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The audio divider needs a specific clock divider driver. With am mpll parent clock, which is able to provide a fairly precise rate, the generic divider tends to select low value of the divider. In such case the quality of the clock is very poor. For the same final rate, maximizing the audio clock divider value and selecting the corresponding mpll rate gives better results. This is what this driver aims to acheive. So far, so good. Cc: Hendrik v. Raven <hendrik@consetetur.de> Acked-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
8 lines
226 B
Makefile
8 lines
226 B
Makefile
#
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# Makefile for Meson specific clk
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#
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obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o clk-audio-divider.o
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obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
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obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
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