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In the SoC branch we normally collect classic arch/arm/mach-* contents, i.e. C code changes for SoC platforms. This release cycle the diffstat is quite nice, in that we're removing 3x the amount of code that's being added. The main reason for this is that there's a removal of camera drivers for Freescale i.MX chips (driver was removed so the device registration isn't needed any more). There's also removal of display initialization code for OMAP that is no longer needed. The rest are mostly minor tweaks and cleanups; constification on Samsung platforms, cleanup of ux500 platform data, purge of other unused platform data/device seutp on i.MX and other good stuff. New SoC support this cycle is for two Allwinner platforms, H2+ and V3s. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYrMs4AAoJEIwa5zzehBx34LQP/j/pzJOw2cLr0iiHwNl/3jyC XFt/F6NFfPuBOCldUoMsZzD2lOR1Qbhp96fAQtDzs/HkGRVxokcHRVJC1QWozSkt 18wm8tc4HtLvjWoeXyh3zFvwl4wiqx4d4r4yxw1wZKA0uhEXrSNJu4P/RgtXH4SK TycfodE35kJ8wCxLNXYr1vaAMKgjmBkk8DAQa5t6XXBnSLGJmNAa5+vCJKab1im+ 9mOZ1EigtrkRR6eL6OJmru3MaZYLg7q+oxq5i/5NOIOZsCWq6Wk4r+5HnTg+8aVf QVs766sEjwZJ5ozZYhYucp8pvQhyatG36vwB51x1XlTA4XzAJwMEgPAtb5Pc/owU cst8d4m24Gc7oChcxlbmrqK64hpF1s5LK/ZbfdLPHaK1PS/ng/teHfVA2Q2HXwur HcHA8dDqgTVCNcCpLX1OgBUbq9S0aopuL9bdeg6q6fU8Skb49BmeHK2Iji3MZSkO 8XdY8H7oKtkwLFx18GJzmdXtH55vIXpHYMvgpjMaWAujtoqZCZ7+GHCmM3GyNCrF +KzJMVdx1lg6yYhfo4rZBWGzK2CrHvq5u5Vq7GExxhVCPsOx3mRQQ0JY/adGWU/y WTCbogwxUNbjlugffwQa+dYdF2KU2kAHAyEFDITndZmp60xJohWPYVJw+7imF5wR 0Qbcj6OvffBcaTdxKzTE =YE8v -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "In the SoC branch we normally collect classic arch/arm/mach-* contents, i.e. C code changes for SoC platforms. This release cycle the diffstat is quite nice, in that we're removing 3x the amount of code that's being added. The main reason for this is that there's a removal of camera drivers for Freescale i.MX chips (driver was removed so the device registration isn't needed any more). There's also removal of display initialization code for OMAP that is no longer needed. The rest are mostly minor tweaks and cleanups; constification on Samsung platforms, cleanup of ux500 platform data, purge of other unused platform data/device seutp on i.MX and other good stuff. New SoC support this cycle is for two Allwinner platforms, H2+ and V3s" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits) ARM: ux500: remove deleted file from Makefile ARM: ep93xx: Disable TS-72xx watchdog before uncompressing ARM: ux500: cut some platform data MAINTAINERS: Update for the current location of the bcm2835 tree. ARM: davinci: remove BUG_ON() from da850_register_sata() ARM: davinci: da850: model the SATA refclk ARM: davinci: da850: add con_id for the SATA clock ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA arm: mvebu: support for SMP on 98DX3336 SoC dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property soc: dove: constify reset_control_ops structures ARM: mv78xx0: fix possible PCI buffer overflow MAINTAINERS: transfer maintainership for the EZX platform ARM: shmobile: rcar-gen2: Add more register documentation ARM: tegra: paz00: Fix __initdata placement ARM: OMAP: clock: Remove unused mpurate cmdline option ARM: davinci: add skeleton for pdata-quirks arm: sunxi: add support for V3s SoC ARM: OMAP2+: omap_hwmod: Add support for earlycon arm: hisi: drop extern hip01_cpu_die ...
69 lines
2.3 KiB
Plaintext
69 lines
2.3 KiB
Plaintext
Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
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DECON (Display and Enhancement Controller) is the Display Controller for the
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Exynos7 series of SoCs which transfers the image data from a video memory
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buffer to an external LCD interface.
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Required properties:
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- compatible: value should be "samsung,exynos7-decon";
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- reg: physical base address and length of the DECON registers set.
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- interrupt-parent: should be the phandle of the decon controller's
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parent interrupt controller.
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- interrupts: should contain a list of all DECON IP block interrupts in the
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order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
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format depends on the interrupt controller used.
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- interrupt-names: should contain the interrupt names: "fifo", "vsync",
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"lcd_sys", in the same order as they were listed in the interrupts
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property.
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- pinctrl-0: pin control group to be used for this controller.
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- pinctrl-names: must contain a "default" entry.
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- clocks: must include clock specifiers corresponding to entries in the
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clock-names property.
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- clock-names: list of clock names sorted in the same order as the clocks
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property. Must contain "pclk_decon0", "aclk_decon0",
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"decon0_eclk", "decon0_vclk".
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- i80-if-timings: timing configuration for lcd i80 interface support.
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Optional Properties:
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- power-domains: a phandle to DECON power domain node.
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- display-timings: timing settings for DECON, as described in document [1].
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Can be used in case timings cannot be provided otherwise
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or to override timings provided by the panel.
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[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
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Example:
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SoC specific DT entry:
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decon@13930000 {
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compatible = "samsung,exynos7-decon";
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interrupt-parent = <&combiner>;
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reg = <0x13930000 0x1000>;
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interrupt-names = "lcd_sys", "vsync", "fifo";
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interrupts = <0 188 0>, <0 189 0>, <0 190 0>;
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clocks = <&clock_disp PCLK_DECON_INT>,
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<&clock_disp ACLK_DECON_INT>,
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<&clock_disp SCLK_DECON_INT_ECLK>,
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<&clock_disp SCLK_DECON_INT_EXTCLKPLL>;
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clock-names = "pclk_decon0", "aclk_decon0", "decon0_eclk",
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"decon0_vclk";
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status = "disabled";
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};
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Board specific DT entry:
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decon@13930000 {
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pinctrl-0 = <&lcd_clk &pwm1_out>;
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pinctrl-names = "default";
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status = "okay";
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};
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