mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 07:55:57 +07:00
e9e863dc1d
The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer" and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer and watchdog). Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers to the SoC.dtsi files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
31 lines
613 B
Plaintext
31 lines
613 B
Plaintext
menuconfig ARCH_MESON
|
|
bool "Amlogic Meson SoCs"
|
|
depends on ARCH_MULTI_V7
|
|
select GPIOLIB
|
|
select GENERIC_IRQ_CHIP
|
|
select ARM_GIC
|
|
select ARM_GLOBAL_TIMER
|
|
select CACHE_L2X0
|
|
select PINCTRL
|
|
select PINCTRL_MESON
|
|
select COMMON_CLK
|
|
select COMMON_CLK_AMLOGIC
|
|
select HAVE_ARM_SCU if SMP
|
|
select HAVE_ARM_TWD if SMP
|
|
|
|
if ARCH_MESON
|
|
|
|
config MACH_MESON6
|
|
bool "Amlogic Meson6 (8726MX) SoCs support"
|
|
default ARCH_MESON
|
|
select MESON6_TIMER
|
|
|
|
config MACH_MESON8
|
|
bool "Amlogic Meson8, Meson8b and Meson8m2 SoCs support"
|
|
default ARCH_MESON
|
|
select MESON6_TIMER
|
|
select COMMON_CLK_MESON8B
|
|
select MESON_IRQ_GPIO
|
|
|
|
endif
|