Vladimir Murzin a40a2b6707 powerpc/bpf: Fix DIVWU instruction opcode ... Currently DIVWU stands for *signed* divw opcode: 7d 2a 4b 96 divwu r9,r10,r9 7d 2a 4b d6 divw r9,r10,r9 Use the *unsigned* divw opcode for DIVWU. Suggested-by: Vassili Karpov <av1474@comtv.ru> Reviewed-by: Vassili Karpov <av1474@comtv.ru> Signed-off-by: Vladimir Murzin <murzin.v@gmail.com> Acked-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>		2013-10-31 16:19:20 +11:00
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asm	powerpc/bpf: Fix DIVWU instruction opcode	2013-10-31 16:19:20 +11:00
uapi/asm	powerpc: Include the appropriate endianness header	2013-10-11 16:48:33 +11:00