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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a3cbfae1f7
The Axis ARTPEC-6 SoC integrates a PCIe controller from Synopsys. Add a new driver that provides the small glue needed to use the existing DesignWare driver to make it work on the Axis ARTPEC-6 SoC. [bhelgaas: return errors directly without gotos, fold in section mismatch fix] Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
33 lines
1.5 KiB
Makefile
33 lines
1.5 KiB
Makefile
obj-$(CONFIG_PCIE_DW) += pcie-designware.o
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obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
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obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
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obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
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obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
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obj-$(CONFIG_PCI_HYPERV) += pci-hyperv.o
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obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
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obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
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obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
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obj-$(CONFIG_PCIE_RCAR) += pcie-rcar.o
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obj-$(CONFIG_PCI_HOST_COMMON) += pci-host-common.o
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obj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o
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obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
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obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o
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obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o
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obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
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obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
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obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o
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obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
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obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
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obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o
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obj-$(CONFIG_PCIE_IPROC_MSI) += pcie-iproc-msi.o
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obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o
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obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
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obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
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obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
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obj-$(CONFIG_PCI_HISI) += pcie-hisi.o
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obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
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obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
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obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
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obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
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obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
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