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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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56a6473339
Previously math-emu was using the IEEE-754 constants internally. These were differing by having the constants for rounding to +/- infinity switched, so a conversion was necessary. This would be entirely avoidable if the MIPS constants were used throughout, so get rid of the bloat. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
190 lines
4.7 KiB
C
190 lines
4.7 KiB
C
/* IEEE754 floating point arithmetic
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* double precision: common utilities
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ieee754dp.h"
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union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
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{
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int s;
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COMPXDP;
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COMPYDP;
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EXPLODEXDP;
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EXPLODEYDP;
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ieee754_clearcx();
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FLUSHXDP;
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FLUSHYDP;
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_nanxcpt(ieee754dp_indef());
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return y;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return x;
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/*
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* Infinity handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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if (xs != ys)
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return x;
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_indef();
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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return ieee754dp_inf(ys ^ 1);
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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return x;
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/*
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* Zero handling
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*/
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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if (xs != ys)
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return x;
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else
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return x;
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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/* quick fix up */
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DPSIGN(y) ^= 1;
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return y;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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DPDNORMX;
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/* FALL THROUGH */
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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/* normalize ym,ye */
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DPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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/* normalize xm,xe */
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DPDNORMX;
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break;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
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break;
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}
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/* flip sign of y and handle as add */
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ys ^= 1;
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assert(xm & DP_HIDDEN_BIT);
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assert(ym & DP_HIDDEN_BIT);
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/* provide guard,round and stick bit dpace */
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xm <<= 3;
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ym <<= 3;
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if (xe > ye) {
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/*
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* Have to shift y fraction right to align
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*/
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s = xe - ye;
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ym = XDPSRS(ym, s);
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ye += s;
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} else if (ye > xe) {
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/*
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* Have to shift x fraction right to align
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*/
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s = ye - xe;
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xm = XDPSRS(xm, s);
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xe += s;
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}
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assert(xe == ye);
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assert(xe <= DP_EMAX);
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if (xs == ys) {
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/* generate 28 bit result of adding two 27 bit numbers
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*/
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xm = xm + ym;
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xe = xe;
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xs = xs;
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if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
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xm = XDPSRS1(xm); /* shift preserving sticky */
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xe++;
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}
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} else {
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if (xm >= ym) {
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xm = xm - ym;
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xe = xe;
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xs = xs;
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} else {
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xm = ym - xm;
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xe = xe;
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xs = ys;
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}
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if (xm == 0) {
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if (ieee754_csr.rm == FPU_CSR_RD)
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return ieee754dp_zero(1); /* round negative inf. => sign = -1 */
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else
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return ieee754dp_zero(0); /* other round modes => sign = 1 */
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}
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/* normalize to rounding precision
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*/
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while ((xm >> (DP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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}
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return ieee754dp_format(xs, xe, xm);
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}
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