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The Marvell Armada 380 SoC includes two AHCI compatible interfaces. However, like all DMA-capable Marvell interface, they require special handling to configure MBus windows. Therefore, this commit adds a new ahci_mvebu driver, which relies on the libahci_platform.c code recently introduced. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Tejun Heo <tj@kernel.org>
42 lines
1.2 KiB
Plaintext
42 lines
1.2 KiB
Plaintext
* AHCI SATA Controller
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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Required properties:
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- compatible : compatible string, one of:
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- "allwinner,sun4i-a10-ahci"
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- "fsl,imx53-ahci"
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- "fsl,imx6q-ahci"
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- "ibm,476gtr-ahci"
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- "marvell,armada-380-ahci"
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- "snps,dwc-ahci"
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- "snps,exynos5440-ahci"
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- "snps,spear-ahci"
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- interrupts : <interrupt mapping for SATA IRQ>
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- reg : <registers mapping>
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Optional properties:
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- dma-coherent : Present if dma operations are coherent
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- clocks : a list of phandle + clock specifier pairs
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- target-supply : regulator for SATA target power
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"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties:
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- clocks : must contain the sata, sata_ref and ahb clocks
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- clock-names : must contain "ahb" for the ahb clock
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Examples:
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sata@ffe08000 {
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compatible = "snps,spear-ahci";
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reg = <0xffe08000 0x1000>;
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interrupts = <115>;
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};
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ahci: sata@01c18000 {
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compatible = "allwinner,sun4i-a10-ahci";
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reg = <0x01c18000 0x1000>;
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interrupts = <56>;
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clocks = <&pll6 0>, <&ahb_gates 25>;
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target-supply = <®_ahci_5v>;
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};
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