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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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![]() Linux expects that if a CPU modifies a memory location, then that modification will eventually become visible to other CPUs in the system. Loongson 3 CPUs include a Store Fill Buffer (SFB) which sits between a core & its L1 data cache, queueing memory accesses & allowing for faster forwarding of data from pending stores to younger loads from the core. Unfortunately the SFB prioritizes loads such that a continuous stream of loads may cause a pending write to be buffered indefinitely. This is problematic if we end up with 2 CPUs which each perform a store that the other polls for - one or both CPUs may end up with their stores buffered in the SFB, never reaching cache due to the continuous reads from the poll loop. Such a deadlock condition has been observed whilst running qspinlock code. This patch changes the definition of cpu_relax() to smp_mb() for Loongson-3, forcing a flush of the SFB on SMP systems which will cause any pending writes to make it as far as the L1 caches where they will become visible to other CPUs. If the kernel is not compiled for SMP support, this will expand to a barrier() as before. This workaround matches that currently implemented for ARM when CONFIG_ARM_ERRATA_754327=y, which was introduced by commit |
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.. | ||
alchemy | ||
ar7 | ||
ath25 | ||
ath79 | ||
bcm47xx | ||
bcm63xx | ||
bmips | ||
boot | ||
cavium-octeon | ||
cobalt | ||
configs | ||
crypto | ||
dec | ||
emma | ||
fw | ||
generic | ||
include | ||
jazz | ||
jz4740 | ||
kernel | ||
kvm | ||
lantiq | ||
lasat | ||
lib | ||
loongson32 | ||
loongson64 | ||
math-emu | ||
mm | ||
mti-malta | ||
net | ||
netlogic | ||
oprofile | ||
paravirt | ||
pci | ||
pic32 | ||
pistachio | ||
pmcs-msp71xx | ||
pnx833x | ||
power | ||
ralink | ||
rb532 | ||
sgi-ip22 | ||
sgi-ip27 | ||
sgi-ip32 | ||
sibyte | ||
sni | ||
tools | ||
txx9 | ||
vdso | ||
vr41xx | ||
Kbuild | ||
Kbuild.platforms | ||
Kconfig | ||
Kconfig.debug | ||
Makefile | ||
Makefile.postlink |