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The size of the DMA buffer can affect the delta time between data being produced and data being consumed. Basically the DMA system will move data to tty buffer when a) DMA buffer is full b) serial line is idle. The situation is visible when producer generates data continuously and there is no possibility for idle line. At this point the DMA buffer is directly affecting the delta time. The patch will add the possibility to configure the DMA buffers in DT, which case by case can be configured separately for every driver instance. The DT configuration is optional and in case missing the driver will use the 4096 buffer with 4 periods (as before), therefore no clients are impacted by this change. Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
34 lines
923 B
Plaintext
34 lines
923 B
Plaintext
* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
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Required properties:
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- compatible : Should be "fsl,<soc>-uart"
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- reg : Address and length of the register set for the device
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- interrupts : Should contain uart interrupt
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Optional properties:
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- fsl,irda-mode : Indicate the uart supports irda mode
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- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
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in DCE mode by default.
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- fsl,dma-size : Indicate the size of the DMA buffer and its periods
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Please check Documentation/devicetree/bindings/serial/serial.txt
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for the complete list of generic properties.
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Note: Each uart controller should have an alias correctly numbered
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in "aliases" node.
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Example:
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aliases {
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serial0 = &uart1;
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};
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uart1: serial@73fbc000 {
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compatible = "fsl,imx51-uart", "fsl,imx21-uart";
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reg = <0x73fbc000 0x4000>;
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interrupts = <31>;
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uart-has-rtscts;
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fsl,dte-mode;
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fsl,dma-size = <1024 4>;
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};
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