mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 13:11:17 +07:00
7c4c62a04a
the evergreen CS parser has allowed this for a while, just port the code to the r600 one. This is required before geom shaders can be made work. v2: agd5f: minor cleanup and add additional 7xx reg. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
757 lines
25 KiB
Plaintext
757 lines
25 KiB
Plaintext
r600 0x9400
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0x000287A0 R7xx_CB_SHADER_CONTROL
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0x00028230 R7xx_PA_SC_EDGERULE
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0x000286C8 R7xx_SPI_THREAD_GROUPING
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0x00008D8C R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
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0x00008490 CP_STRMOUT_CNTL
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0x000085F0 CP_COHER_CNTL
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0x000085F4 CP_COHER_SIZE
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0x000088C4 VGT_CACHE_INVALIDATION
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0x00028A50 VGT_ENHANCE
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0x000088CC VGT_ES_PER_GS
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0x00028A2C VGT_GROUP_DECR
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0x00028A28 VGT_GROUP_FIRST_DECR
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0x00028A24 VGT_GROUP_PRIM_TYPE
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0x00028A30 VGT_GROUP_VECT_0_CNTL
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0x00028A38 VGT_GROUP_VECT_0_FMT_CNTL
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0x00028A34 VGT_GROUP_VECT_1_CNTL
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0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL
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0x00028A40 VGT_GS_MODE
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0x00028A6C VGT_GS_OUT_PRIM_TYPE
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0x00028B38 VGT_GS_MAX_VERT_OUT
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0x000088C8 VGT_GS_PER_ES
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0x000088E8 VGT_GS_PER_VS
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0x000088D4 VGT_GS_VERTEX_REUSE
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0x00028A14 VGT_HOS_CNTL
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0x00028A18 VGT_HOS_MAX_TESS_LEVEL
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0x00028A1C VGT_HOS_MIN_TESS_LEVEL
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0x00028A20 VGT_HOS_REUSE_DEPTH
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0x0000895C VGT_INDEX_TYPE
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0x00028408 VGT_INDX_OFFSET
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0x00028AA0 VGT_INSTANCE_STEP_RATE_0
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0x00028AA4 VGT_INSTANCE_STEP_RATE_1
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0x00028400 VGT_MAX_VTX_INDX
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0x00028404 VGT_MIN_VTX_INDX
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0x00028A94 VGT_MULTI_PRIM_IB_RESET_EN
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0x0002840C VGT_MULTI_PRIM_IB_RESET_INDX
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0x00008970 VGT_NUM_INDICES
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0x00008974 VGT_NUM_INSTANCES
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0x00028A10 VGT_OUTPUT_PATH_CNTL
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0x00028A84 VGT_PRIMITIVEID_EN
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0x00008958 VGT_PRIMITIVE_TYPE
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0x00028AB4 VGT_REUSE_OFF
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0x00028AB8 VGT_VTX_CNT_EN
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0x000088B0 VGT_VTX_VECT_EJECT_REG
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0x00028AD4 VGT_STRMOUT_VTX_STRIDE_0
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0x00028AE4 VGT_STRMOUT_VTX_STRIDE_1
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0x00028AF4 VGT_STRMOUT_VTX_STRIDE_2
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0x00028B04 VGT_STRMOUT_VTX_STRIDE_3
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0x00028B28 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
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0x00028B2C VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
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0x00028B30 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
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0x00028810 PA_CL_CLIP_CNTL
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0x00008A14 PA_CL_ENHANCE
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0x00028C14 PA_CL_GB_HORZ_CLIP_ADJ
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0x00028C18 PA_CL_GB_HORZ_DISC_ADJ
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0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
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0x00028C10 PA_CL_GB_VERT_DISC_ADJ
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0x00028820 PA_CL_NANINF_CNTL
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0x00028E1C PA_CL_POINT_CULL_RAD
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0x00028E18 PA_CL_POINT_SIZE
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0x00028E10 PA_CL_POINT_X_RAD
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0x00028E14 PA_CL_POINT_Y_RAD
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0x00028E2C PA_CL_UCP_0_W
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0x00028E3C PA_CL_UCP_1_W
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0x00028E4C PA_CL_UCP_2_W
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0x00028E5C PA_CL_UCP_3_W
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0x00028E6C PA_CL_UCP_4_W
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0x00028E7C PA_CL_UCP_5_W
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0x00028E20 PA_CL_UCP_0_X
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0x00028E30 PA_CL_UCP_1_X
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0x00028E40 PA_CL_UCP_2_X
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0x00028E50 PA_CL_UCP_3_X
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0x00028E60 PA_CL_UCP_4_X
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0x00028E70 PA_CL_UCP_5_X
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0x00028E24 PA_CL_UCP_0_Y
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0x00028E34 PA_CL_UCP_1_Y
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0x00028E44 PA_CL_UCP_2_Y
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0x00028E54 PA_CL_UCP_3_Y
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0x00028E64 PA_CL_UCP_4_Y
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0x00028E74 PA_CL_UCP_5_Y
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0x00028E28 PA_CL_UCP_0_Z
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0x00028E38 PA_CL_UCP_1_Z
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0x00028E48 PA_CL_UCP_2_Z
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0x00028E58 PA_CL_UCP_3_Z
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0x00028E68 PA_CL_UCP_4_Z
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0x00028E78 PA_CL_UCP_5_Z
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0x00028440 PA_CL_VPORT_XOFFSET_0
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0x00028458 PA_CL_VPORT_XOFFSET_1
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0x00028470 PA_CL_VPORT_XOFFSET_2
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0x00028488 PA_CL_VPORT_XOFFSET_3
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0x000284A0 PA_CL_VPORT_XOFFSET_4
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0x000284B8 PA_CL_VPORT_XOFFSET_5
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0x000284D0 PA_CL_VPORT_XOFFSET_6
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0x000284E8 PA_CL_VPORT_XOFFSET_7
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0x00028500 PA_CL_VPORT_XOFFSET_8
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0x00028518 PA_CL_VPORT_XOFFSET_9
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0x00028530 PA_CL_VPORT_XOFFSET_10
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0x00028548 PA_CL_VPORT_XOFFSET_11
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0x00028560 PA_CL_VPORT_XOFFSET_12
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0x00028578 PA_CL_VPORT_XOFFSET_13
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0x00028590 PA_CL_VPORT_XOFFSET_14
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0x000285A8 PA_CL_VPORT_XOFFSET_15
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0x0002843C PA_CL_VPORT_XSCALE_0
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0x00028454 PA_CL_VPORT_XSCALE_1
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0x0002846C PA_CL_VPORT_XSCALE_2
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0x00028484 PA_CL_VPORT_XSCALE_3
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0x0002849C PA_CL_VPORT_XSCALE_4
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0x000284B4 PA_CL_VPORT_XSCALE_5
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0x000284CC PA_CL_VPORT_XSCALE_6
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0x000284E4 PA_CL_VPORT_XSCALE_7
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0x000284FC PA_CL_VPORT_XSCALE_8
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0x00028514 PA_CL_VPORT_XSCALE_9
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0x0002852C PA_CL_VPORT_XSCALE_10
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0x00028544 PA_CL_VPORT_XSCALE_11
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0x0002855C PA_CL_VPORT_XSCALE_12
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0x00028574 PA_CL_VPORT_XSCALE_13
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0x0002858C PA_CL_VPORT_XSCALE_14
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0x000285A4 PA_CL_VPORT_XSCALE_15
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0x00028448 PA_CL_VPORT_YOFFSET_0
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0x00028460 PA_CL_VPORT_YOFFSET_1
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0x00028478 PA_CL_VPORT_YOFFSET_2
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0x00028490 PA_CL_VPORT_YOFFSET_3
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0x000284A8 PA_CL_VPORT_YOFFSET_4
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0x000284C0 PA_CL_VPORT_YOFFSET_5
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0x000284D8 PA_CL_VPORT_YOFFSET_6
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0x000284F0 PA_CL_VPORT_YOFFSET_7
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0x00028508 PA_CL_VPORT_YOFFSET_8
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0x00028520 PA_CL_VPORT_YOFFSET_9
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0x00028538 PA_CL_VPORT_YOFFSET_10
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0x00028550 PA_CL_VPORT_YOFFSET_11
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0x00028568 PA_CL_VPORT_YOFFSET_12
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0x00028580 PA_CL_VPORT_YOFFSET_13
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0x00028598 PA_CL_VPORT_YOFFSET_14
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0x000285B0 PA_CL_VPORT_YOFFSET_15
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0x00028444 PA_CL_VPORT_YSCALE_0
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0x0002845C PA_CL_VPORT_YSCALE_1
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0x00028474 PA_CL_VPORT_YSCALE_2
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0x0002848C PA_CL_VPORT_YSCALE_3
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0x000284A4 PA_CL_VPORT_YSCALE_4
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0x000284BC PA_CL_VPORT_YSCALE_5
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0x000284D4 PA_CL_VPORT_YSCALE_6
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0x000284EC PA_CL_VPORT_YSCALE_7
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0x00028504 PA_CL_VPORT_YSCALE_8
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0x0002851C PA_CL_VPORT_YSCALE_9
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0x00028534 PA_CL_VPORT_YSCALE_10
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0x0002854C PA_CL_VPORT_YSCALE_11
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0x00028564 PA_CL_VPORT_YSCALE_12
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0x0002857C PA_CL_VPORT_YSCALE_13
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0x00028594 PA_CL_VPORT_YSCALE_14
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0x000285AC PA_CL_VPORT_YSCALE_15
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0x00028450 PA_CL_VPORT_ZOFFSET_0
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0x00028468 PA_CL_VPORT_ZOFFSET_1
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0x00028480 PA_CL_VPORT_ZOFFSET_2
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0x00028498 PA_CL_VPORT_ZOFFSET_3
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0x000284B0 PA_CL_VPORT_ZOFFSET_4
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0x000284C8 PA_CL_VPORT_ZOFFSET_5
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0x000284E0 PA_CL_VPORT_ZOFFSET_6
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0x000284F8 PA_CL_VPORT_ZOFFSET_7
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0x00028510 PA_CL_VPORT_ZOFFSET_8
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0x00028528 PA_CL_VPORT_ZOFFSET_9
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0x00028540 PA_CL_VPORT_ZOFFSET_10
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0x00028558 PA_CL_VPORT_ZOFFSET_11
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0x00028570 PA_CL_VPORT_ZOFFSET_12
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0x00028588 PA_CL_VPORT_ZOFFSET_13
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0x000285A0 PA_CL_VPORT_ZOFFSET_14
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0x000285B8 PA_CL_VPORT_ZOFFSET_15
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0x0002844C PA_CL_VPORT_ZSCALE_0
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0x00028464 PA_CL_VPORT_ZSCALE_1
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0x0002847C PA_CL_VPORT_ZSCALE_2
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0x00028494 PA_CL_VPORT_ZSCALE_3
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0x000284AC PA_CL_VPORT_ZSCALE_4
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0x000284C4 PA_CL_VPORT_ZSCALE_5
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0x000284DC PA_CL_VPORT_ZSCALE_6
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0x000284F4 PA_CL_VPORT_ZSCALE_7
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0x0002850C PA_CL_VPORT_ZSCALE_8
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0x00028524 PA_CL_VPORT_ZSCALE_9
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0x0002853C PA_CL_VPORT_ZSCALE_10
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0x00028554 PA_CL_VPORT_ZSCALE_11
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0x0002856C PA_CL_VPORT_ZSCALE_12
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0x00028584 PA_CL_VPORT_ZSCALE_13
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0x0002859C PA_CL_VPORT_ZSCALE_14
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0x000285B4 PA_CL_VPORT_ZSCALE_15
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0x0002881C PA_CL_VS_OUT_CNTL
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0x00028818 PA_CL_VTE_CNTL
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0x00028C48 PA_SC_AA_MASK
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0x00008B40 PA_SC_AA_SAMPLE_LOCS_2S
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0x00008B44 PA_SC_AA_SAMPLE_LOCS_4S
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0x00008B48 PA_SC_AA_SAMPLE_LOCS_8S_WD0
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0x00008B4C PA_SC_AA_SAMPLE_LOCS_8S_WD1
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0x00028C20 PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX
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0x00028C1C PA_SC_AA_SAMPLE_LOCS_MCTX
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0x00028214 PA_SC_CLIPRECT_0_BR
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0x0002821C PA_SC_CLIPRECT_1_BR
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0x00028224 PA_SC_CLIPRECT_2_BR
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0x0002822C PA_SC_CLIPRECT_3_BR
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0x00028210 PA_SC_CLIPRECT_0_TL
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0x00028218 PA_SC_CLIPRECT_1_TL
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0x00028220 PA_SC_CLIPRECT_2_TL
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0x00028228 PA_SC_CLIPRECT_3_TL
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0x0002820C PA_SC_CLIPRECT_RULE
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0x00008BF0 PA_SC_ENHANCE
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0x00028244 PA_SC_GENERIC_SCISSOR_BR
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0x00028240 PA_SC_GENERIC_SCISSOR_TL
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0x00028C00 PA_SC_LINE_CNTL
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0x00028A0C PA_SC_LINE_STIPPLE
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0x00008B10 PA_SC_LINE_STIPPLE_STATE
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0x00028A4C PA_SC_MODE_CNTL
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0x00028A48 PA_SC_MPASS_PS_CNTL
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0x00008B20 PA_SC_MULTI_CHIP_CNTL
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0x00028034 PA_SC_SCREEN_SCISSOR_BR
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0x00028030 PA_SC_SCREEN_SCISSOR_TL
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0x00028254 PA_SC_VPORT_SCISSOR_0_BR
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0x0002825C PA_SC_VPORT_SCISSOR_1_BR
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0x00028264 PA_SC_VPORT_SCISSOR_2_BR
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0x0002826C PA_SC_VPORT_SCISSOR_3_BR
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0x00028274 PA_SC_VPORT_SCISSOR_4_BR
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0x0002827C PA_SC_VPORT_SCISSOR_5_BR
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0x00028284 PA_SC_VPORT_SCISSOR_6_BR
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0x0002828C PA_SC_VPORT_SCISSOR_7_BR
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0x00028294 PA_SC_VPORT_SCISSOR_8_BR
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0x0002829C PA_SC_VPORT_SCISSOR_9_BR
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0x000282A4 PA_SC_VPORT_SCISSOR_10_BR
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0x000282AC PA_SC_VPORT_SCISSOR_11_BR
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0x000282B4 PA_SC_VPORT_SCISSOR_12_BR
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0x000282BC PA_SC_VPORT_SCISSOR_13_BR
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0x000282C4 PA_SC_VPORT_SCISSOR_14_BR
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0x000282CC PA_SC_VPORT_SCISSOR_15_BR
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0x00028250 PA_SC_VPORT_SCISSOR_0_TL
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0x00028258 PA_SC_VPORT_SCISSOR_1_TL
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0x00028260 PA_SC_VPORT_SCISSOR_2_TL
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0x00028268 PA_SC_VPORT_SCISSOR_3_TL
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0x00028270 PA_SC_VPORT_SCISSOR_4_TL
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0x00028278 PA_SC_VPORT_SCISSOR_5_TL
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0x00028280 PA_SC_VPORT_SCISSOR_6_TL
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0x00028288 PA_SC_VPORT_SCISSOR_7_TL
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0x00028290 PA_SC_VPORT_SCISSOR_8_TL
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0x00028298 PA_SC_VPORT_SCISSOR_9_TL
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0x000282A0 PA_SC_VPORT_SCISSOR_10_TL
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0x000282A8 PA_SC_VPORT_SCISSOR_11_TL
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0x000282B0 PA_SC_VPORT_SCISSOR_12_TL
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0x000282B8 PA_SC_VPORT_SCISSOR_13_TL
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0x000282C0 PA_SC_VPORT_SCISSOR_14_TL
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0x000282C8 PA_SC_VPORT_SCISSOR_15_TL
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0x000282D4 PA_SC_VPORT_ZMAX_0
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0x000282DC PA_SC_VPORT_ZMAX_1
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0x000282E4 PA_SC_VPORT_ZMAX_2
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0x000282EC PA_SC_VPORT_ZMAX_3
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0x000282F4 PA_SC_VPORT_ZMAX_4
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0x000282FC PA_SC_VPORT_ZMAX_5
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0x00028304 PA_SC_VPORT_ZMAX_6
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0x0002830C PA_SC_VPORT_ZMAX_7
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0x00028314 PA_SC_VPORT_ZMAX_8
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0x0002831C PA_SC_VPORT_ZMAX_9
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0x00028324 PA_SC_VPORT_ZMAX_10
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0x0002832C PA_SC_VPORT_ZMAX_11
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0x00028334 PA_SC_VPORT_ZMAX_12
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0x0002833C PA_SC_VPORT_ZMAX_13
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0x00028344 PA_SC_VPORT_ZMAX_14
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0x0002834C PA_SC_VPORT_ZMAX_15
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0x000282D0 PA_SC_VPORT_ZMIN_0
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0x000282D8 PA_SC_VPORT_ZMIN_1
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0x000282E0 PA_SC_VPORT_ZMIN_2
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0x000282E8 PA_SC_VPORT_ZMIN_3
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0x000282F0 PA_SC_VPORT_ZMIN_4
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0x000282F8 PA_SC_VPORT_ZMIN_5
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0x00028300 PA_SC_VPORT_ZMIN_6
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0x00028308 PA_SC_VPORT_ZMIN_7
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0x00028310 PA_SC_VPORT_ZMIN_8
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0x00028318 PA_SC_VPORT_ZMIN_9
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0x00028320 PA_SC_VPORT_ZMIN_10
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0x00028328 PA_SC_VPORT_ZMIN_11
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0x00028330 PA_SC_VPORT_ZMIN_12
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0x00028338 PA_SC_VPORT_ZMIN_13
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0x00028340 PA_SC_VPORT_ZMIN_14
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0x00028348 PA_SC_VPORT_ZMIN_15
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0x00028200 PA_SC_WINDOW_OFFSET
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0x00028208 PA_SC_WINDOW_SCISSOR_BR
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0x00028204 PA_SC_WINDOW_SCISSOR_TL
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0x00028A08 PA_SU_LINE_CNTL
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0x00028A04 PA_SU_POINT_MINMAX
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0x00028A00 PA_SU_POINT_SIZE
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0x00028E0C PA_SU_POLY_OFFSET_BACK_OFFSET
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0x00028E08 PA_SU_POLY_OFFSET_BACK_SCALE
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0x00028DFC PA_SU_POLY_OFFSET_CLAMP
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0x00028DF8 PA_SU_POLY_OFFSET_DB_FMT_CNTL
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0x00028E04 PA_SU_POLY_OFFSET_FRONT_OFFSET
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0x00028E00 PA_SU_POLY_OFFSET_FRONT_SCALE
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0x00028814 PA_SU_SC_MODE_CNTL
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0x00028C08 PA_SU_VTX_CNTL
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0x00008C04 SQ_GPR_RESOURCE_MGMT_1
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0x00008C08 SQ_GPR_RESOURCE_MGMT_2
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0x00008C10 SQ_STACK_RESOURCE_MGMT_1
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0x00008C14 SQ_STACK_RESOURCE_MGMT_2
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0x00008C0C SQ_THREAD_RESOURCE_MGMT
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0x00028380 SQ_VTX_SEMANTIC_0
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0x00028384 SQ_VTX_SEMANTIC_1
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0x00028388 SQ_VTX_SEMANTIC_2
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0x0002838C SQ_VTX_SEMANTIC_3
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0x00028390 SQ_VTX_SEMANTIC_4
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0x00028394 SQ_VTX_SEMANTIC_5
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0x00028398 SQ_VTX_SEMANTIC_6
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0x0002839C SQ_VTX_SEMANTIC_7
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0x000283A0 SQ_VTX_SEMANTIC_8
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0x000283A4 SQ_VTX_SEMANTIC_9
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0x000283A8 SQ_VTX_SEMANTIC_10
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0x000283AC SQ_VTX_SEMANTIC_11
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0x000283B0 SQ_VTX_SEMANTIC_12
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0x000283B4 SQ_VTX_SEMANTIC_13
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0x000283B8 SQ_VTX_SEMANTIC_14
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0x000283BC SQ_VTX_SEMANTIC_15
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0x000283C0 SQ_VTX_SEMANTIC_16
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0x000283C4 SQ_VTX_SEMANTIC_17
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0x000283C8 SQ_VTX_SEMANTIC_18
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0x000283CC SQ_VTX_SEMANTIC_19
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0x000283D0 SQ_VTX_SEMANTIC_20
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0x000283D4 SQ_VTX_SEMANTIC_21
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0x000283D8 SQ_VTX_SEMANTIC_22
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0x000283DC SQ_VTX_SEMANTIC_23
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0x000283E0 SQ_VTX_SEMANTIC_24
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0x000283E4 SQ_VTX_SEMANTIC_25
|
|
0x000283E8 SQ_VTX_SEMANTIC_26
|
|
0x000283EC SQ_VTX_SEMANTIC_27
|
|
0x000283F0 SQ_VTX_SEMANTIC_28
|
|
0x000283F4 SQ_VTX_SEMANTIC_29
|
|
0x000283F8 SQ_VTX_SEMANTIC_30
|
|
0x000283FC SQ_VTX_SEMANTIC_31
|
|
0x000288E0 SQ_VTX_SEMANTIC_CLEAR
|
|
0x0003CFF4 SQ_VTX_START_INST_LOC
|
|
0x000281C0 SQ_ALU_CONST_BUFFER_SIZE_GS_0
|
|
0x000281C4 SQ_ALU_CONST_BUFFER_SIZE_GS_1
|
|
0x000281C8 SQ_ALU_CONST_BUFFER_SIZE_GS_2
|
|
0x000281CC SQ_ALU_CONST_BUFFER_SIZE_GS_3
|
|
0x000281D0 SQ_ALU_CONST_BUFFER_SIZE_GS_4
|
|
0x000281D4 SQ_ALU_CONST_BUFFER_SIZE_GS_5
|
|
0x000281D8 SQ_ALU_CONST_BUFFER_SIZE_GS_6
|
|
0x000281DC SQ_ALU_CONST_BUFFER_SIZE_GS_7
|
|
0x000281E0 SQ_ALU_CONST_BUFFER_SIZE_GS_8
|
|
0x000281E4 SQ_ALU_CONST_BUFFER_SIZE_GS_9
|
|
0x000281E8 SQ_ALU_CONST_BUFFER_SIZE_GS_10
|
|
0x000281EC SQ_ALU_CONST_BUFFER_SIZE_GS_11
|
|
0x000281F0 SQ_ALU_CONST_BUFFER_SIZE_GS_12
|
|
0x000281F4 SQ_ALU_CONST_BUFFER_SIZE_GS_13
|
|
0x000281F8 SQ_ALU_CONST_BUFFER_SIZE_GS_14
|
|
0x000281FC SQ_ALU_CONST_BUFFER_SIZE_GS_15
|
|
0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0
|
|
0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
|
|
0x00028148 SQ_ALU_CONST_BUFFER_SIZE_PS_2
|
|
0x0002814C SQ_ALU_CONST_BUFFER_SIZE_PS_3
|
|
0x00028150 SQ_ALU_CONST_BUFFER_SIZE_PS_4
|
|
0x00028154 SQ_ALU_CONST_BUFFER_SIZE_PS_5
|
|
0x00028158 SQ_ALU_CONST_BUFFER_SIZE_PS_6
|
|
0x0002815C SQ_ALU_CONST_BUFFER_SIZE_PS_7
|
|
0x00028160 SQ_ALU_CONST_BUFFER_SIZE_PS_8
|
|
0x00028164 SQ_ALU_CONST_BUFFER_SIZE_PS_9
|
|
0x00028168 SQ_ALU_CONST_BUFFER_SIZE_PS_10
|
|
0x0002816C SQ_ALU_CONST_BUFFER_SIZE_PS_11
|
|
0x00028170 SQ_ALU_CONST_BUFFER_SIZE_PS_12
|
|
0x00028174 SQ_ALU_CONST_BUFFER_SIZE_PS_13
|
|
0x00028178 SQ_ALU_CONST_BUFFER_SIZE_PS_14
|
|
0x0002817C SQ_ALU_CONST_BUFFER_SIZE_PS_15
|
|
0x00028180 SQ_ALU_CONST_BUFFER_SIZE_VS_0
|
|
0x00028184 SQ_ALU_CONST_BUFFER_SIZE_VS_1
|
|
0x00028188 SQ_ALU_CONST_BUFFER_SIZE_VS_2
|
|
0x0002818C SQ_ALU_CONST_BUFFER_SIZE_VS_3
|
|
0x00028190 SQ_ALU_CONST_BUFFER_SIZE_VS_4
|
|
0x00028194 SQ_ALU_CONST_BUFFER_SIZE_VS_5
|
|
0x00028198 SQ_ALU_CONST_BUFFER_SIZE_VS_6
|
|
0x0002819C SQ_ALU_CONST_BUFFER_SIZE_VS_7
|
|
0x000281A0 SQ_ALU_CONST_BUFFER_SIZE_VS_8
|
|
0x000281A4 SQ_ALU_CONST_BUFFER_SIZE_VS_9
|
|
0x000281A8 SQ_ALU_CONST_BUFFER_SIZE_VS_10
|
|
0x000281AC SQ_ALU_CONST_BUFFER_SIZE_VS_11
|
|
0x000281B0 SQ_ALU_CONST_BUFFER_SIZE_VS_12
|
|
0x000281B4 SQ_ALU_CONST_BUFFER_SIZE_VS_13
|
|
0x000281B8 SQ_ALU_CONST_BUFFER_SIZE_VS_14
|
|
0x000281BC SQ_ALU_CONST_BUFFER_SIZE_VS_15
|
|
0x000288D8 SQ_PGM_CF_OFFSET_ES
|
|
0x000288DC SQ_PGM_CF_OFFSET_FS
|
|
0x000288D4 SQ_PGM_CF_OFFSET_GS
|
|
0x000288CC SQ_PGM_CF_OFFSET_PS
|
|
0x000288D0 SQ_PGM_CF_OFFSET_VS
|
|
0x00028854 SQ_PGM_EXPORTS_PS
|
|
0x00028890 SQ_PGM_RESOURCES_ES
|
|
0x000288A4 SQ_PGM_RESOURCES_FS
|
|
0x0002887C SQ_PGM_RESOURCES_GS
|
|
0x00028850 SQ_PGM_RESOURCES_PS
|
|
0x00028868 SQ_PGM_RESOURCES_VS
|
|
0x00009100 SPI_CONFIG_CNTL
|
|
0x0000913C SPI_CONFIG_CNTL_1
|
|
0x000286DC SPI_FOG_CNTL
|
|
0x000286E4 SPI_FOG_FUNC_BIAS
|
|
0x000286E0 SPI_FOG_FUNC_SCALE
|
|
0x000286D8 SPI_INPUT_Z
|
|
0x000286D4 SPI_INTERP_CONTROL_0
|
|
0x00028644 SPI_PS_INPUT_CNTL_0
|
|
0x00028648 SPI_PS_INPUT_CNTL_1
|
|
0x0002864C SPI_PS_INPUT_CNTL_2
|
|
0x00028650 SPI_PS_INPUT_CNTL_3
|
|
0x00028654 SPI_PS_INPUT_CNTL_4
|
|
0x00028658 SPI_PS_INPUT_CNTL_5
|
|
0x0002865C SPI_PS_INPUT_CNTL_6
|
|
0x00028660 SPI_PS_INPUT_CNTL_7
|
|
0x00028664 SPI_PS_INPUT_CNTL_8
|
|
0x00028668 SPI_PS_INPUT_CNTL_9
|
|
0x0002866C SPI_PS_INPUT_CNTL_10
|
|
0x00028670 SPI_PS_INPUT_CNTL_11
|
|
0x00028674 SPI_PS_INPUT_CNTL_12
|
|
0x00028678 SPI_PS_INPUT_CNTL_13
|
|
0x0002867C SPI_PS_INPUT_CNTL_14
|
|
0x00028680 SPI_PS_INPUT_CNTL_15
|
|
0x00028684 SPI_PS_INPUT_CNTL_16
|
|
0x00028688 SPI_PS_INPUT_CNTL_17
|
|
0x0002868C SPI_PS_INPUT_CNTL_18
|
|
0x00028690 SPI_PS_INPUT_CNTL_19
|
|
0x00028694 SPI_PS_INPUT_CNTL_20
|
|
0x00028698 SPI_PS_INPUT_CNTL_21
|
|
0x0002869C SPI_PS_INPUT_CNTL_22
|
|
0x000286A0 SPI_PS_INPUT_CNTL_23
|
|
0x000286A4 SPI_PS_INPUT_CNTL_24
|
|
0x000286A8 SPI_PS_INPUT_CNTL_25
|
|
0x000286AC SPI_PS_INPUT_CNTL_26
|
|
0x000286B0 SPI_PS_INPUT_CNTL_27
|
|
0x000286B4 SPI_PS_INPUT_CNTL_28
|
|
0x000286B8 SPI_PS_INPUT_CNTL_29
|
|
0x000286BC SPI_PS_INPUT_CNTL_30
|
|
0x000286C0 SPI_PS_INPUT_CNTL_31
|
|
0x000286CC SPI_PS_IN_CONTROL_0
|
|
0x000286D0 SPI_PS_IN_CONTROL_1
|
|
0x000286C4 SPI_VS_OUT_CONFIG
|
|
0x00028614 SPI_VS_OUT_ID_0
|
|
0x00028618 SPI_VS_OUT_ID_1
|
|
0x0002861C SPI_VS_OUT_ID_2
|
|
0x00028620 SPI_VS_OUT_ID_3
|
|
0x00028624 SPI_VS_OUT_ID_4
|
|
0x00028628 SPI_VS_OUT_ID_5
|
|
0x0002862C SPI_VS_OUT_ID_6
|
|
0x00028630 SPI_VS_OUT_ID_7
|
|
0x00028634 SPI_VS_OUT_ID_8
|
|
0x00028638 SPI_VS_OUT_ID_9
|
|
0x00028438 SX_ALPHA_REF
|
|
0x00028410 SX_ALPHA_TEST_CONTROL
|
|
0x00028354 SX_SURFACE_SYNC
|
|
0x00009014 SX_MEMORY_EXPORT_SIZE
|
|
0x00009604 TC_INVALIDATE
|
|
0x00009400 TD_FILTER4
|
|
0x00009404 TD_FILTER4_1
|
|
0x00009408 TD_FILTER4_2
|
|
0x0000940C TD_FILTER4_3
|
|
0x00009410 TD_FILTER4_4
|
|
0x00009414 TD_FILTER4_5
|
|
0x00009418 TD_FILTER4_6
|
|
0x0000941C TD_FILTER4_7
|
|
0x00009420 TD_FILTER4_8
|
|
0x00009424 TD_FILTER4_9
|
|
0x00009428 TD_FILTER4_10
|
|
0x0000942C TD_FILTER4_11
|
|
0x00009430 TD_FILTER4_12
|
|
0x00009434 TD_FILTER4_13
|
|
0x00009438 TD_FILTER4_14
|
|
0x0000943C TD_FILTER4_15
|
|
0x00009440 TD_FILTER4_16
|
|
0x00009444 TD_FILTER4_17
|
|
0x00009448 TD_FILTER4_18
|
|
0x0000944C TD_FILTER4_19
|
|
0x00009450 TD_FILTER4_20
|
|
0x00009454 TD_FILTER4_21
|
|
0x00009458 TD_FILTER4_22
|
|
0x0000945C TD_FILTER4_23
|
|
0x00009460 TD_FILTER4_24
|
|
0x00009464 TD_FILTER4_25
|
|
0x00009468 TD_FILTER4_26
|
|
0x0000946C TD_FILTER4_27
|
|
0x00009470 TD_FILTER4_28
|
|
0x00009474 TD_FILTER4_29
|
|
0x00009478 TD_FILTER4_30
|
|
0x0000947C TD_FILTER4_31
|
|
0x00009480 TD_FILTER4_32
|
|
0x00009484 TD_FILTER4_33
|
|
0x00009488 TD_FILTER4_34
|
|
0x0000948C TD_FILTER4_35
|
|
0x0000A80C TD_GS_SAMPLER0_BORDER_ALPHA
|
|
0x0000A81C TD_GS_SAMPLER1_BORDER_ALPHA
|
|
0x0000A82C TD_GS_SAMPLER2_BORDER_ALPHA
|
|
0x0000A83C TD_GS_SAMPLER3_BORDER_ALPHA
|
|
0x0000A84C TD_GS_SAMPLER4_BORDER_ALPHA
|
|
0x0000A85C TD_GS_SAMPLER5_BORDER_ALPHA
|
|
0x0000A86C TD_GS_SAMPLER6_BORDER_ALPHA
|
|
0x0000A87C TD_GS_SAMPLER7_BORDER_ALPHA
|
|
0x0000A88C TD_GS_SAMPLER8_BORDER_ALPHA
|
|
0x0000A89C TD_GS_SAMPLER9_BORDER_ALPHA
|
|
0x0000A8AC TD_GS_SAMPLER10_BORDER_ALPHA
|
|
0x0000A8BC TD_GS_SAMPLER11_BORDER_ALPHA
|
|
0x0000A8CC TD_GS_SAMPLER12_BORDER_ALPHA
|
|
0x0000A8DC TD_GS_SAMPLER13_BORDER_ALPHA
|
|
0x0000A8EC TD_GS_SAMPLER14_BORDER_ALPHA
|
|
0x0000A8FC TD_GS_SAMPLER15_BORDER_ALPHA
|
|
0x0000A90C TD_GS_SAMPLER16_BORDER_ALPHA
|
|
0x0000A91C TD_GS_SAMPLER17_BORDER_ALPHA
|
|
0x0000A808 TD_GS_SAMPLER0_BORDER_BLUE
|
|
0x0000A818 TD_GS_SAMPLER1_BORDER_BLUE
|
|
0x0000A828 TD_GS_SAMPLER2_BORDER_BLUE
|
|
0x0000A838 TD_GS_SAMPLER3_BORDER_BLUE
|
|
0x0000A848 TD_GS_SAMPLER4_BORDER_BLUE
|
|
0x0000A858 TD_GS_SAMPLER5_BORDER_BLUE
|
|
0x0000A868 TD_GS_SAMPLER6_BORDER_BLUE
|
|
0x0000A878 TD_GS_SAMPLER7_BORDER_BLUE
|
|
0x0000A888 TD_GS_SAMPLER8_BORDER_BLUE
|
|
0x0000A898 TD_GS_SAMPLER9_BORDER_BLUE
|
|
0x0000A8A8 TD_GS_SAMPLER10_BORDER_BLUE
|
|
0x0000A8B8 TD_GS_SAMPLER11_BORDER_BLUE
|
|
0x0000A8C8 TD_GS_SAMPLER12_BORDER_BLUE
|
|
0x0000A8D8 TD_GS_SAMPLER13_BORDER_BLUE
|
|
0x0000A8E8 TD_GS_SAMPLER14_BORDER_BLUE
|
|
0x0000A8F8 TD_GS_SAMPLER15_BORDER_BLUE
|
|
0x0000A908 TD_GS_SAMPLER16_BORDER_BLUE
|
|
0x0000A918 TD_GS_SAMPLER17_BORDER_BLUE
|
|
0x0000A804 TD_GS_SAMPLER0_BORDER_GREEN
|
|
0x0000A814 TD_GS_SAMPLER1_BORDER_GREEN
|
|
0x0000A824 TD_GS_SAMPLER2_BORDER_GREEN
|
|
0x0000A834 TD_GS_SAMPLER3_BORDER_GREEN
|
|
0x0000A844 TD_GS_SAMPLER4_BORDER_GREEN
|
|
0x0000A854 TD_GS_SAMPLER5_BORDER_GREEN
|
|
0x0000A864 TD_GS_SAMPLER6_BORDER_GREEN
|
|
0x0000A874 TD_GS_SAMPLER7_BORDER_GREEN
|
|
0x0000A884 TD_GS_SAMPLER8_BORDER_GREEN
|
|
0x0000A894 TD_GS_SAMPLER9_BORDER_GREEN
|
|
0x0000A8A4 TD_GS_SAMPLER10_BORDER_GREEN
|
|
0x0000A8B4 TD_GS_SAMPLER11_BORDER_GREEN
|
|
0x0000A8C4 TD_GS_SAMPLER12_BORDER_GREEN
|
|
0x0000A8D4 TD_GS_SAMPLER13_BORDER_GREEN
|
|
0x0000A8E4 TD_GS_SAMPLER14_BORDER_GREEN
|
|
0x0000A8F4 TD_GS_SAMPLER15_BORDER_GREEN
|
|
0x0000A904 TD_GS_SAMPLER16_BORDER_GREEN
|
|
0x0000A914 TD_GS_SAMPLER17_BORDER_GREEN
|
|
0x0000A800 TD_GS_SAMPLER0_BORDER_RED
|
|
0x0000A810 TD_GS_SAMPLER1_BORDER_RED
|
|
0x0000A820 TD_GS_SAMPLER2_BORDER_RED
|
|
0x0000A830 TD_GS_SAMPLER3_BORDER_RED
|
|
0x0000A840 TD_GS_SAMPLER4_BORDER_RED
|
|
0x0000A850 TD_GS_SAMPLER5_BORDER_RED
|
|
0x0000A860 TD_GS_SAMPLER6_BORDER_RED
|
|
0x0000A870 TD_GS_SAMPLER7_BORDER_RED
|
|
0x0000A880 TD_GS_SAMPLER8_BORDER_RED
|
|
0x0000A890 TD_GS_SAMPLER9_BORDER_RED
|
|
0x0000A8A0 TD_GS_SAMPLER10_BORDER_RED
|
|
0x0000A8B0 TD_GS_SAMPLER11_BORDER_RED
|
|
0x0000A8C0 TD_GS_SAMPLER12_BORDER_RED
|
|
0x0000A8D0 TD_GS_SAMPLER13_BORDER_RED
|
|
0x0000A8E0 TD_GS_SAMPLER14_BORDER_RED
|
|
0x0000A8F0 TD_GS_SAMPLER15_BORDER_RED
|
|
0x0000A900 TD_GS_SAMPLER16_BORDER_RED
|
|
0x0000A910 TD_GS_SAMPLER17_BORDER_RED
|
|
0x0000A40C TD_PS_SAMPLER0_BORDER_ALPHA
|
|
0x0000A41C TD_PS_SAMPLER1_BORDER_ALPHA
|
|
0x0000A42C TD_PS_SAMPLER2_BORDER_ALPHA
|
|
0x0000A43C TD_PS_SAMPLER3_BORDER_ALPHA
|
|
0x0000A44C TD_PS_SAMPLER4_BORDER_ALPHA
|
|
0x0000A45C TD_PS_SAMPLER5_BORDER_ALPHA
|
|
0x0000A46C TD_PS_SAMPLER6_BORDER_ALPHA
|
|
0x0000A47C TD_PS_SAMPLER7_BORDER_ALPHA
|
|
0x0000A48C TD_PS_SAMPLER8_BORDER_ALPHA
|
|
0x0000A49C TD_PS_SAMPLER9_BORDER_ALPHA
|
|
0x0000A4AC TD_PS_SAMPLER10_BORDER_ALPHA
|
|
0x0000A4BC TD_PS_SAMPLER11_BORDER_ALPHA
|
|
0x0000A4CC TD_PS_SAMPLER12_BORDER_ALPHA
|
|
0x0000A4DC TD_PS_SAMPLER13_BORDER_ALPHA
|
|
0x0000A4EC TD_PS_SAMPLER14_BORDER_ALPHA
|
|
0x0000A4FC TD_PS_SAMPLER15_BORDER_ALPHA
|
|
0x0000A50C TD_PS_SAMPLER16_BORDER_ALPHA
|
|
0x0000A51C TD_PS_SAMPLER17_BORDER_ALPHA
|
|
0x0000A408 TD_PS_SAMPLER0_BORDER_BLUE
|
|
0x0000A418 TD_PS_SAMPLER1_BORDER_BLUE
|
|
0x0000A428 TD_PS_SAMPLER2_BORDER_BLUE
|
|
0x0000A438 TD_PS_SAMPLER3_BORDER_BLUE
|
|
0x0000A448 TD_PS_SAMPLER4_BORDER_BLUE
|
|
0x0000A458 TD_PS_SAMPLER5_BORDER_BLUE
|
|
0x0000A468 TD_PS_SAMPLER6_BORDER_BLUE
|
|
0x0000A478 TD_PS_SAMPLER7_BORDER_BLUE
|
|
0x0000A488 TD_PS_SAMPLER8_BORDER_BLUE
|
|
0x0000A498 TD_PS_SAMPLER9_BORDER_BLUE
|
|
0x0000A4A8 TD_PS_SAMPLER10_BORDER_BLUE
|
|
0x0000A4B8 TD_PS_SAMPLER11_BORDER_BLUE
|
|
0x0000A4C8 TD_PS_SAMPLER12_BORDER_BLUE
|
|
0x0000A4D8 TD_PS_SAMPLER13_BORDER_BLUE
|
|
0x0000A4E8 TD_PS_SAMPLER14_BORDER_BLUE
|
|
0x0000A4F8 TD_PS_SAMPLER15_BORDER_BLUE
|
|
0x0000A508 TD_PS_SAMPLER16_BORDER_BLUE
|
|
0x0000A518 TD_PS_SAMPLER17_BORDER_BLUE
|
|
0x0000A404 TD_PS_SAMPLER0_BORDER_GREEN
|
|
0x0000A414 TD_PS_SAMPLER1_BORDER_GREEN
|
|
0x0000A424 TD_PS_SAMPLER2_BORDER_GREEN
|
|
0x0000A434 TD_PS_SAMPLER3_BORDER_GREEN
|
|
0x0000A444 TD_PS_SAMPLER4_BORDER_GREEN
|
|
0x0000A454 TD_PS_SAMPLER5_BORDER_GREEN
|
|
0x0000A464 TD_PS_SAMPLER6_BORDER_GREEN
|
|
0x0000A474 TD_PS_SAMPLER7_BORDER_GREEN
|
|
0x0000A484 TD_PS_SAMPLER8_BORDER_GREEN
|
|
0x0000A494 TD_PS_SAMPLER9_BORDER_GREEN
|
|
0x0000A4A4 TD_PS_SAMPLER10_BORDER_GREEN
|
|
0x0000A4B4 TD_PS_SAMPLER11_BORDER_GREEN
|
|
0x0000A4C4 TD_PS_SAMPLER12_BORDER_GREEN
|
|
0x0000A4D4 TD_PS_SAMPLER13_BORDER_GREEN
|
|
0x0000A4E4 TD_PS_SAMPLER14_BORDER_GREEN
|
|
0x0000A4F4 TD_PS_SAMPLER15_BORDER_GREEN
|
|
0x0000A504 TD_PS_SAMPLER16_BORDER_GREEN
|
|
0x0000A514 TD_PS_SAMPLER17_BORDER_GREEN
|
|
0x0000A400 TD_PS_SAMPLER0_BORDER_RED
|
|
0x0000A410 TD_PS_SAMPLER1_BORDER_RED
|
|
0x0000A420 TD_PS_SAMPLER2_BORDER_RED
|
|
0x0000A430 TD_PS_SAMPLER3_BORDER_RED
|
|
0x0000A440 TD_PS_SAMPLER4_BORDER_RED
|
|
0x0000A450 TD_PS_SAMPLER5_BORDER_RED
|
|
0x0000A460 TD_PS_SAMPLER6_BORDER_RED
|
|
0x0000A470 TD_PS_SAMPLER7_BORDER_RED
|
|
0x0000A480 TD_PS_SAMPLER8_BORDER_RED
|
|
0x0000A490 TD_PS_SAMPLER9_BORDER_RED
|
|
0x0000A4A0 TD_PS_SAMPLER10_BORDER_RED
|
|
0x0000A4B0 TD_PS_SAMPLER11_BORDER_RED
|
|
0x0000A4C0 TD_PS_SAMPLER12_BORDER_RED
|
|
0x0000A4D0 TD_PS_SAMPLER13_BORDER_RED
|
|
0x0000A4E0 TD_PS_SAMPLER14_BORDER_RED
|
|
0x0000A4F0 TD_PS_SAMPLER15_BORDER_RED
|
|
0x0000A500 TD_PS_SAMPLER16_BORDER_RED
|
|
0x0000A510 TD_PS_SAMPLER17_BORDER_RED
|
|
0x0000AA00 TD_PS_SAMPLER0_CLEARTYPE_KERNEL
|
|
0x0000AA04 TD_PS_SAMPLER1_CLEARTYPE_KERNEL
|
|
0x0000AA08 TD_PS_SAMPLER2_CLEARTYPE_KERNEL
|
|
0x0000AA0C TD_PS_SAMPLER3_CLEARTYPE_KERNEL
|
|
0x0000AA10 TD_PS_SAMPLER4_CLEARTYPE_KERNEL
|
|
0x0000AA14 TD_PS_SAMPLER5_CLEARTYPE_KERNEL
|
|
0x0000AA18 TD_PS_SAMPLER6_CLEARTYPE_KERNEL
|
|
0x0000AA1C TD_PS_SAMPLER7_CLEARTYPE_KERNEL
|
|
0x0000AA20 TD_PS_SAMPLER8_CLEARTYPE_KERNEL
|
|
0x0000AA24 TD_PS_SAMPLER9_CLEARTYPE_KERNEL
|
|
0x0000AA28 TD_PS_SAMPLER10_CLEARTYPE_KERNEL
|
|
0x0000AA2C TD_PS_SAMPLER11_CLEARTYPE_KERNEL
|
|
0x0000AA30 TD_PS_SAMPLER12_CLEARTYPE_KERNEL
|
|
0x0000AA34 TD_PS_SAMPLER13_CLEARTYPE_KERNEL
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0x0000AA38 TD_PS_SAMPLER14_CLEARTYPE_KERNEL
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0x0000AA3C TD_PS_SAMPLER15_CLEARTYPE_KERNEL
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0x0000AA40 TD_PS_SAMPLER16_CLEARTYPE_KERNEL
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0x0000AA44 TD_PS_SAMPLER17_CLEARTYPE_KERNEL
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0x0000A60C TD_VS_SAMPLER0_BORDER_ALPHA
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0x0000A61C TD_VS_SAMPLER1_BORDER_ALPHA
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0x0000A62C TD_VS_SAMPLER2_BORDER_ALPHA
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0x0000A63C TD_VS_SAMPLER3_BORDER_ALPHA
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0x0000A64C TD_VS_SAMPLER4_BORDER_ALPHA
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0x0000A65C TD_VS_SAMPLER5_BORDER_ALPHA
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0x0000A66C TD_VS_SAMPLER6_BORDER_ALPHA
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0x0000A67C TD_VS_SAMPLER7_BORDER_ALPHA
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0x0000A68C TD_VS_SAMPLER8_BORDER_ALPHA
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0x0000A69C TD_VS_SAMPLER9_BORDER_ALPHA
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0x0000A6AC TD_VS_SAMPLER10_BORDER_ALPHA
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0x0000A6BC TD_VS_SAMPLER11_BORDER_ALPHA
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0x0000A6CC TD_VS_SAMPLER12_BORDER_ALPHA
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0x0000A6DC TD_VS_SAMPLER13_BORDER_ALPHA
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0x0000A6EC TD_VS_SAMPLER14_BORDER_ALPHA
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0x0000A6FC TD_VS_SAMPLER15_BORDER_ALPHA
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0x0000A70C TD_VS_SAMPLER16_BORDER_ALPHA
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0x0000A71C TD_VS_SAMPLER17_BORDER_ALPHA
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0x0000A608 TD_VS_SAMPLER0_BORDER_BLUE
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0x0000A618 TD_VS_SAMPLER1_BORDER_BLUE
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0x0000A628 TD_VS_SAMPLER2_BORDER_BLUE
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0x0000A638 TD_VS_SAMPLER3_BORDER_BLUE
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0x0000A648 TD_VS_SAMPLER4_BORDER_BLUE
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0x0000A658 TD_VS_SAMPLER5_BORDER_BLUE
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0x0000A668 TD_VS_SAMPLER6_BORDER_BLUE
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0x0000A678 TD_VS_SAMPLER7_BORDER_BLUE
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0x0000A688 TD_VS_SAMPLER8_BORDER_BLUE
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0x0000A698 TD_VS_SAMPLER9_BORDER_BLUE
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0x0000A6A8 TD_VS_SAMPLER10_BORDER_BLUE
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0x0000A6B8 TD_VS_SAMPLER11_BORDER_BLUE
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0x0000A6C8 TD_VS_SAMPLER12_BORDER_BLUE
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0x0000A6D8 TD_VS_SAMPLER13_BORDER_BLUE
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0x0000A6E8 TD_VS_SAMPLER14_BORDER_BLUE
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0x0000A6F8 TD_VS_SAMPLER15_BORDER_BLUE
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0x0000A708 TD_VS_SAMPLER16_BORDER_BLUE
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0x0000A718 TD_VS_SAMPLER17_BORDER_BLUE
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0x0000A604 TD_VS_SAMPLER0_BORDER_GREEN
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0x0000A614 TD_VS_SAMPLER1_BORDER_GREEN
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0x0000A624 TD_VS_SAMPLER2_BORDER_GREEN
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0x0000A634 TD_VS_SAMPLER3_BORDER_GREEN
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0x0000A644 TD_VS_SAMPLER4_BORDER_GREEN
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0x0000A654 TD_VS_SAMPLER5_BORDER_GREEN
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0x0000A664 TD_VS_SAMPLER6_BORDER_GREEN
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0x0000A674 TD_VS_SAMPLER7_BORDER_GREEN
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0x0000A684 TD_VS_SAMPLER8_BORDER_GREEN
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0x0000A694 TD_VS_SAMPLER9_BORDER_GREEN
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0x0000A6A4 TD_VS_SAMPLER10_BORDER_GREEN
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0x0000A6B4 TD_VS_SAMPLER11_BORDER_GREEN
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0x0000A6C4 TD_VS_SAMPLER12_BORDER_GREEN
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0x0000A6D4 TD_VS_SAMPLER13_BORDER_GREEN
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0x0000A6E4 TD_VS_SAMPLER14_BORDER_GREEN
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0x0000A6F4 TD_VS_SAMPLER15_BORDER_GREEN
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0x0000A704 TD_VS_SAMPLER16_BORDER_GREEN
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0x0000A714 TD_VS_SAMPLER17_BORDER_GREEN
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0x0000A600 TD_VS_SAMPLER0_BORDER_RED
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0x0000A610 TD_VS_SAMPLER1_BORDER_RED
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0x0000A620 TD_VS_SAMPLER2_BORDER_RED
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0x0000A630 TD_VS_SAMPLER3_BORDER_RED
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0x0000A640 TD_VS_SAMPLER4_BORDER_RED
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0x0000A650 TD_VS_SAMPLER5_BORDER_RED
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0x0000A660 TD_VS_SAMPLER6_BORDER_RED
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0x0000A670 TD_VS_SAMPLER7_BORDER_RED
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0x0000A680 TD_VS_SAMPLER8_BORDER_RED
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0x0000A690 TD_VS_SAMPLER9_BORDER_RED
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0x0000A6A0 TD_VS_SAMPLER10_BORDER_RED
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0x0000A6B0 TD_VS_SAMPLER11_BORDER_RED
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0x0000A6C0 TD_VS_SAMPLER12_BORDER_RED
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0x0000A6D0 TD_VS_SAMPLER13_BORDER_RED
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0x0000A6E0 TD_VS_SAMPLER14_BORDER_RED
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0x0000A6F0 TD_VS_SAMPLER15_BORDER_RED
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0x0000A700 TD_VS_SAMPLER16_BORDER_RED
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0x0000A710 TD_VS_SAMPLER17_BORDER_RED
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0x00009508 TA_CNTL_AUX
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0x0002802C DB_DEPTH_CLEAR
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0x00028D34 DB_PREFETCH_LIMIT
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0x00028D30 DB_PRELOAD_CONTROL
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0x00028D0C DB_RENDER_CONTROL
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0x00028D10 DB_RENDER_OVERRIDE
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0x0002880C DB_SHADER_CONTROL
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0x00028D28 DB_SRESULTS_COMPARE_STATE0
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0x00028D2C DB_SRESULTS_COMPARE_STATE1
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0x00028430 DB_STENCILREFMASK
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0x00028434 DB_STENCILREFMASK_BF
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0x00028028 DB_STENCIL_CLEAR
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0x00028780 CB_BLEND0_CONTROL
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0x00028784 CB_BLEND1_CONTROL
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0x00028788 CB_BLEND2_CONTROL
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0x0002878C CB_BLEND3_CONTROL
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0x00028790 CB_BLEND4_CONTROL
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0x00028794 CB_BLEND5_CONTROL
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0x00028798 CB_BLEND6_CONTROL
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0x0002879C CB_BLEND7_CONTROL
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0x00028804 CB_BLEND_CONTROL
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0x00028420 CB_BLEND_ALPHA
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0x0002841C CB_BLEND_BLUE
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0x00028418 CB_BLEND_GREEN
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0x00028414 CB_BLEND_RED
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0x0002812C CB_CLEAR_ALPHA
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0x00028128 CB_CLEAR_BLUE
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0x00028124 CB_CLEAR_GREEN
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0x00028120 CB_CLEAR_RED
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0x00028C30 CB_CLRCMP_CONTROL
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0x00028C38 CB_CLRCMP_DST
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0x00028C3C CB_CLRCMP_MSK
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0x00028C34 CB_CLRCMP_SRC
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0x0002842C CB_FOG_BLUE
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0x00028428 CB_FOG_GREEN
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0x00028424 CB_FOG_RED
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0x00008040 WAIT_UNTIL
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0x00009714 VC_ENHANCE
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0x00009830 DB_DEBUG
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0x00009838 DB_WATERMARKS
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0x00028D44 DB_ALPHA_TO_MASK
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0x00009700 VC_CNTL
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