linux_dsm_epyc7002/arch/x86/lib
Janakarajan Natarajan 454de1e7d9 x86/asm: Fix MWAITX C-state hint value
As per "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose
and System Instructions", MWAITX EAX[7:4]+1 specifies the optional hint
of the optimized C-state. For C0 state, EAX[7:4] should be set to 0xf.

Currently, a value of 0xf is set for EAX[3:0] instead of EAX[7:4]. Fix
this by changing MWAITX_DISABLE_CSTATES from 0xf to 0xf0.

This hasn't had any implications so far because setting reserved bits in
EAX is simply ignored by the CPU.

 [ bp: Fixup comment in delay_mwaitx() and massage. ]

Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Frederic Weisbecker <frederic@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "x86@kernel.org" <x86@kernel.org>
Cc: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20191007190011.4859-1-Janakarajan.Natarajan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-10-08 13:25:24 +02:00
..
.gitignore
atomic64_32.c
atomic64_386_32.S
atomic64_cx8_32.S
cache-smp.c
checksum_32.S
clear_page_64.S
cmdline.c
cmpxchg8b_emu.S
cmpxchg16b_emu.S
copy_page_64.S
copy_user_64.S
cpu.c
csum-copy_64.S
csum-partial_64.c
csum-wrappers_64.c
delay.c
error-inject.c
getuser.S
hweight.S
inat.c
insn-eval.c
insn.c
iomap_copy_64.S
iomem.c
kaslr.c
Makefile
memcpy_32.c
memcpy_64.S
memmove_64.S
memset_64.S
misc.c
mmx_32.c
msr-reg-export.c
msr-reg.S
msr-smp.c
msr.c
putuser.S
retpoline.S
string_32.c
strstr_32.c
usercopy_32.c
usercopy_64.c
usercopy.c
x86-opcode-map.txt