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a25bd72bad
There's a somewhat architectural issue with Radix MMU and KVM.
When coming out of a guest with AIL (Alternate Interrupt Location, ie,
MMU enabled), we start executing hypervisor code with the PID register
still containing whatever the guest has been using.
The problem is that the CPU can (and will) then start prefetching or
speculatively load from whatever host context has that same PID (if
any), thus bringing translations for that context into the TLB, which
Linux doesn't know about.
This can cause stale translations and subsequent crashes.
Fixing this in a way that is neither racy nor a huge performance
impact is difficult. We could just make the host invalidations always
use broadcast forms but that would hurt single threaded programs for
example.
We chose to fix it instead by partitioning the PID space between guest
and host. This is possible because today Linux only use 19 out of the
20 bits of PID space, so existing guests will work if we make the host
use the top half of the 20 bits space.
We additionally add support for a property to indicate to Linux the
size of the PID register which will be useful if we eventually have
processors with a larger PID space available.
There is still an issue with malicious guests purposefully setting the
PID register to a value in the hosts PID range. Hopefully future HW
can prevent that, but in the meantime, we handle it with a pair of
kludges:
- On the way out of a guest, before we clear the current VCPU in the
PACA, we check the PID and if it's outside of the permitted range
we flush the TLB for that PID.
- When context switching, if the mm is "new" on that CPU (the
corresponding bit was set for the first time in the mm cpumask), we
check if any sibling thread is in KVM (has a non-NULL VCPU pointer
in the PACA). If that is the case, we also flush the PID for that
CPU (core).
This second part is needed to handle the case where a process is
migrated (or starts a new pthread) on a sibling thread of the CPU
coming out of KVM, as there's a window where stale translations can
exist before we detect it and flush them out.
A future optimization could be added by keeping track of whether the
PID has ever been used and avoid doing that for completely fresh PIDs.
We could similarily mark PIDs that have been the subject of a global
invalidation as "fresh". But for now this will do.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[mpe: Rework the asm to build with CONFIG_PPC_RADIX_MMU=n, drop
unneeded include of kvm_book3s_asm.h]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
200 lines
6.0 KiB
C
200 lines
6.0 KiB
C
#ifndef __ASM_POWERPC_MMU_CONTEXT_H
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#define __ASM_POWERPC_MMU_CONTEXT_H
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#ifdef __KERNEL__
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <asm/mmu.h>
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#include <asm/cputable.h>
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#include <asm/cputhreads.h>
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/*
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* Most if the context management is out of line
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*/
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extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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#ifdef CONFIG_SPAPR_TCE_IOMMU
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struct mm_iommu_table_group_mem_t;
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extern int isolate_lru_page(struct page *page); /* from internal.h */
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extern bool mm_iommu_preregistered(struct mm_struct *mm);
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extern long mm_iommu_get(struct mm_struct *mm,
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unsigned long ua, unsigned long entries,
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struct mm_iommu_table_group_mem_t **pmem);
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extern long mm_iommu_put(struct mm_struct *mm,
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struct mm_iommu_table_group_mem_t *mem);
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extern void mm_iommu_init(struct mm_struct *mm);
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extern void mm_iommu_cleanup(struct mm_struct *mm);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
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unsigned long ua, unsigned long size);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(
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struct mm_struct *mm, unsigned long ua, unsigned long size);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm,
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unsigned long ua, unsigned long entries);
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extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
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unsigned long ua, unsigned long *hpa);
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extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
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unsigned long ua, unsigned long *hpa);
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extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
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extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
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#endif
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extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
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extern void set_context(unsigned long id, pgd_t *pgd);
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#ifdef CONFIG_PPC_BOOK3S_64
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extern void radix__switch_mmu_context(struct mm_struct *prev,
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struct mm_struct *next);
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static inline void switch_mmu_context(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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if (radix_enabled())
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return radix__switch_mmu_context(prev, next);
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return switch_slb(tsk, next);
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}
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extern int hash__alloc_context_id(void);
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extern void hash__reserve_context_id(int id);
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extern void __destroy_context(int context_id);
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static inline void mmu_context_init(void) { }
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#else
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extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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extern unsigned long __init_new_context(void);
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extern void __destroy_context(unsigned long context_id);
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extern void mmu_context_init(void);
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#endif
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#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
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extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
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#else
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static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
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#endif
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extern void switch_cop(struct mm_struct *next);
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extern int use_cop(unsigned long acop, struct mm_struct *mm);
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extern void drop_cop(unsigned long acop, struct mm_struct *mm);
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/*
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* switch_mm is the entry point called from the architecture independent
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* code in kernel/sched/core.c
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*/
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static inline void switch_mm_irqs_off(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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bool new_on_cpu = false;
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/* Mark this context has been used on the new CPU */
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if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) {
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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new_on_cpu = true;
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}
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/* 32-bit keeps track of the current PGDIR in the thread struct */
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#ifdef CONFIG_PPC32
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tsk->thread.pgdir = next->pgd;
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#endif /* CONFIG_PPC32 */
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/* 64-bit Book3E keeps track of current PGD in the PACA */
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#ifdef CONFIG_PPC_BOOK3E_64
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get_paca()->pgd = next->pgd;
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#endif
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/* Nothing else to do if we aren't actually switching */
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if (prev == next)
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return;
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#ifdef CONFIG_PPC_ICSWX
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/* Switch coprocessor context only if prev or next uses a coprocessor */
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if (prev->context.acop || next->context.acop)
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switch_cop(next);
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#endif /* CONFIG_PPC_ICSWX */
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/* We must stop all altivec streams before changing the HW
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* context
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*/
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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asm volatile ("dssall");
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#endif /* CONFIG_ALTIVEC */
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if (new_on_cpu)
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radix_kvm_prefetch_workaround(next);
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/*
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* The actual HW switching method differs between the various
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* sub architectures. Out of line for now
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*/
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switch_mmu_context(prev, next, tsk);
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch_mm_irqs_off(prev, next, tsk);
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local_irq_restore(flags);
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}
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#define switch_mm_irqs_off switch_mm_irqs_off
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#define deactivate_mm(tsk,mm) do { } while (0)
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch_mm(prev, next, current);
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local_irq_restore(flags);
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}
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/* We don't currently use enter_lazy_tlb() for anything */
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static inline void enter_lazy_tlb(struct mm_struct *mm,
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struct task_struct *tsk)
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{
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/* 64-bit Book3E keeps track of current PGD in the PACA */
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#ifdef CONFIG_PPC_BOOK3E_64
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get_paca()->pgd = NULL;
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#endif
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}
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static inline void arch_dup_mmap(struct mm_struct *oldmm,
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struct mm_struct *mm)
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{
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}
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static inline void arch_exit_mmap(struct mm_struct *mm)
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{
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}
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static inline void arch_unmap(struct mm_struct *mm,
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struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (start <= mm->context.vdso_base && mm->context.vdso_base < end)
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mm->context.vdso_base = 0;
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}
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static inline void arch_bprm_mm_init(struct mm_struct *mm,
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struct vm_area_struct *vma)
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{
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}
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static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
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bool write, bool execute, bool foreign)
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{
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/* by default, allow everything */
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return true;
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}
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
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