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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e2771deb5d
The current code, since commitbb43d40d7c
("drm/sun4i: rgb: Validate the clock rate"), perform some validation on the pixel clock to filter out the EDID modes provided by monitors (through bridges) that we wouldn't be able to reach. For the usual modes, we're able to generate a perfect clock rate, so a strict check was enough. However, this had the side effect of preventing displays that would work otherwise to operate properly, since we would pretty much never be able to generate an exact rate for those displays, even though we would fall within that panel tolerance. This was also shown to happen for unusual modes exposed through EDIDs, for example on eDP panels. We can work around this by simplifying a bit the problem: no panels we've encountered so far actually needed that check. All of them are tied to a particular board when it is produced, and made to work with the Allwinner BSP. That pretty much guarantees that we never have a pixel clock out of reach. On the other hand, the EDIDs modes that needed to be validated have always been exposed through bridges. Let's just use that metric to instead of validating all modes, only validate modes when we have a bridge attached. It should be good enough for now, while we still have room for improvements or refinements using the display_timings structure for example for panels. We also add a tolerance for EDID-based modes instead of doing a strict check. This tolerance is of 0.5% which is the one advertised in the VESA DVT and CVT specs. If that needed to be extended in the future, we can add a custom module parameter to relax it a bit. Fixes:bb43d40d7c
("drm/sun4i: rgb: Validate the clock rate") Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> # tested on pinebook Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/ec2dc2a7b3d4bd44f7a2a6e1c1813f92449a7310.1551191081.git-series.maxime.ripard@bootlin.com
274 lines
6.8 KiB
C
274 lines
6.8 KiB
C
/*
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* Copyright (C) 2015 Free Electrons
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* Copyright (C) 2015 NextThing Co
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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#include "sun4i_crtc.h"
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#include "sun4i_tcon.h"
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#include "sun4i_rgb.h"
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struct sun4i_rgb {
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struct drm_connector connector;
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struct drm_encoder encoder;
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struct sun4i_tcon *tcon;
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struct drm_panel *panel;
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struct drm_bridge *bridge;
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};
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static inline struct sun4i_rgb *
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drm_connector_to_sun4i_rgb(struct drm_connector *connector)
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{
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return container_of(connector, struct sun4i_rgb,
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connector);
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}
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static inline struct sun4i_rgb *
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drm_encoder_to_sun4i_rgb(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct sun4i_rgb,
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encoder);
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}
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static int sun4i_rgb_get_modes(struct drm_connector *connector)
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{
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struct sun4i_rgb *rgb =
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drm_connector_to_sun4i_rgb(connector);
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return drm_panel_get_modes(rgb->panel);
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}
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/*
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* VESA DMT defines a tolerance of 0.5% on the pixel clock, while the
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* CVT spec reuses that tolerance in its examples, so it looks to be a
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* good default tolerance for the EDID-based modes. Define it to 5 per
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* mille to avoid floating point operations.
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*/
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#define SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE 5
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static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc,
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const struct drm_display_mode *mode)
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{
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struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(crtc);
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struct sun4i_tcon *tcon = rgb->tcon;
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u32 hsync = mode->hsync_end - mode->hsync_start;
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u32 vsync = mode->vsync_end - mode->vsync_start;
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unsigned long long rate = mode->clock * 1000;
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unsigned long long lowest, highest;
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unsigned long long rounded_rate;
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DRM_DEBUG_DRIVER("Validating modes...\n");
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if (hsync < 1)
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return MODE_HSYNC_NARROW;
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if (hsync > 0x3ff)
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return MODE_HSYNC_WIDE;
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if ((mode->hdisplay < 1) || (mode->htotal < 1))
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return MODE_H_ILLEGAL;
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if ((mode->hdisplay > 0x7ff) || (mode->htotal > 0xfff))
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return MODE_BAD_HVALUE;
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DRM_DEBUG_DRIVER("Horizontal parameters OK\n");
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if (vsync < 1)
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return MODE_VSYNC_NARROW;
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if (vsync > 0x3ff)
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return MODE_VSYNC_WIDE;
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if ((mode->vdisplay < 1) || (mode->vtotal < 1))
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return MODE_V_ILLEGAL;
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if ((mode->vdisplay > 0x7ff) || (mode->vtotal > 0xfff))
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return MODE_BAD_VVALUE;
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DRM_DEBUG_DRIVER("Vertical parameters OK\n");
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/*
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* TODO: We should use the struct display_timing if available
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* and / or trying to stretch the timings within that
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* tolerancy to take care of panels that we wouldn't be able
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* to have a exact match for.
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*/
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if (rgb->panel) {
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DRM_DEBUG_DRIVER("RGB panel used, skipping clock rate checks");
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goto out;
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}
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/*
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* That shouldn't ever happen unless something is really wrong, but it
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* doesn't harm to check.
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*/
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if (!rgb->bridge)
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goto out;
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tcon->dclk_min_div = 6;
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tcon->dclk_max_div = 127;
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rounded_rate = clk_round_rate(tcon->dclk, rate);
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lowest = rate * (1000 - SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE);
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do_div(lowest, 1000);
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if (rounded_rate < lowest)
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return MODE_CLOCK_LOW;
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highest = rate * (1000 + SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE);
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do_div(highest, 1000);
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if (rounded_rate > highest)
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return MODE_CLOCK_HIGH;
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out:
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DRM_DEBUG_DRIVER("Clock rate OK\n");
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return MODE_OK;
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}
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static struct drm_connector_helper_funcs sun4i_rgb_con_helper_funcs = {
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.get_modes = sun4i_rgb_get_modes,
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};
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static void
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sun4i_rgb_connector_destroy(struct drm_connector *connector)
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{
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struct sun4i_rgb *rgb = drm_connector_to_sun4i_rgb(connector);
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drm_panel_detach(rgb->panel);
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drm_connector_cleanup(connector);
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}
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static const struct drm_connector_funcs sun4i_rgb_con_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = sun4i_rgb_connector_destroy,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static void sun4i_rgb_encoder_enable(struct drm_encoder *encoder)
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{
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struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(encoder);
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DRM_DEBUG_DRIVER("Enabling RGB output\n");
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if (rgb->panel) {
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drm_panel_prepare(rgb->panel);
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drm_panel_enable(rgb->panel);
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}
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}
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static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder)
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{
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struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(encoder);
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DRM_DEBUG_DRIVER("Disabling RGB output\n");
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if (rgb->panel) {
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drm_panel_disable(rgb->panel);
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drm_panel_unprepare(rgb->panel);
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}
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}
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static struct drm_encoder_helper_funcs sun4i_rgb_enc_helper_funcs = {
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.disable = sun4i_rgb_encoder_disable,
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.enable = sun4i_rgb_encoder_enable,
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.mode_valid = sun4i_rgb_mode_valid,
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};
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static void sun4i_rgb_enc_destroy(struct drm_encoder *encoder)
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{
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drm_encoder_cleanup(encoder);
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}
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static struct drm_encoder_funcs sun4i_rgb_enc_funcs = {
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.destroy = sun4i_rgb_enc_destroy,
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};
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int sun4i_rgb_init(struct drm_device *drm, struct sun4i_tcon *tcon)
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{
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struct drm_encoder *encoder;
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struct sun4i_rgb *rgb;
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int ret;
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rgb = devm_kzalloc(drm->dev, sizeof(*rgb), GFP_KERNEL);
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if (!rgb)
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return -ENOMEM;
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rgb->tcon = tcon;
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encoder = &rgb->encoder;
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ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0,
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&rgb->panel, &rgb->bridge);
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if (ret) {
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dev_info(drm->dev, "No panel or bridge found... RGB output disabled\n");
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return 0;
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}
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drm_encoder_helper_add(&rgb->encoder,
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&sun4i_rgb_enc_helper_funcs);
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ret = drm_encoder_init(drm,
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&rgb->encoder,
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&sun4i_rgb_enc_funcs,
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DRM_MODE_ENCODER_NONE,
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NULL);
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if (ret) {
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dev_err(drm->dev, "Couldn't initialise the rgb encoder\n");
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goto err_out;
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}
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/* The RGB encoder can only work with the TCON channel 0 */
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rgb->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc);
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if (rgb->panel) {
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drm_connector_helper_add(&rgb->connector,
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&sun4i_rgb_con_helper_funcs);
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ret = drm_connector_init(drm, &rgb->connector,
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&sun4i_rgb_con_funcs,
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DRM_MODE_CONNECTOR_Unknown);
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if (ret) {
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dev_err(drm->dev, "Couldn't initialise the rgb connector\n");
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goto err_cleanup_connector;
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}
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drm_connector_attach_encoder(&rgb->connector,
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&rgb->encoder);
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ret = drm_panel_attach(rgb->panel, &rgb->connector);
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if (ret) {
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dev_err(drm->dev, "Couldn't attach our panel\n");
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goto err_cleanup_connector;
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}
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}
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if (rgb->bridge) {
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ret = drm_bridge_attach(encoder, rgb->bridge, NULL);
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if (ret) {
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dev_err(drm->dev, "Couldn't attach our bridge\n");
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goto err_cleanup_connector;
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}
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}
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return 0;
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err_cleanup_connector:
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drm_encoder_cleanup(&rgb->encoder);
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err_out:
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return ret;
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}
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EXPORT_SYMBOL(sun4i_rgb_init);
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