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dcdecdcfe1
Recently genphy_read_abilities() has been added that dynamically detects clause 22 PHY abilities. I *think* this detection should work with all supported PHY's, at least for the ones with basic features sets, i.e. PHY_BASIC_FEATURES and PHY_GBIT_FEATURES. So let's remove setting these features explicitly and rely on phylib feature detection. I don't have access to most of these PHY's, therefore I'd appreciate regression testing. v2: - make the feature constant a comment so that readers know which features are supported by the respective PHY Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
294 lines
6.3 KiB
C
294 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* drivers/net/phy/lxt.c
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*
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* Driver for Intel LXT PHYs
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*
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* Author: Andy Fleming
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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/* The Level one LXT970 is used by many boards */
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#define MII_LXT970_IER 17 /* Interrupt Enable Register */
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#define MII_LXT970_IER_IEN 0x0002
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#define MII_LXT970_ISR 18 /* Interrupt Status Register */
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#define MII_LXT970_CONFIG 19 /* Configuration Register */
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/* ------------------------------------------------------------------------- */
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/* The Level one LXT971 is used on some of my custom boards */
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/* register definitions for the 971 */
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#define MII_LXT971_IER 18 /* Interrupt Enable Register */
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#define MII_LXT971_IER_IEN 0x00f2
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#define MII_LXT971_ISR 19 /* Interrupt Status Register */
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/* register definitions for the 973 */
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#define MII_LXT973_PCR 16 /* Port Configuration Register */
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#define PCR_FIBER_SELECT 1
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MODULE_DESCRIPTION("Intel LXT PHY driver");
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MODULE_AUTHOR("Andy Fleming");
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MODULE_LICENSE("GPL");
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static int lxt970_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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err = phy_read(phydev, MII_BMSR);
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if (err < 0)
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return err;
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err = phy_read(phydev, MII_LXT970_ISR);
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if (err < 0)
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return err;
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return 0;
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}
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static int lxt970_config_intr(struct phy_device *phydev)
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{
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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return phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
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else
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return phy_write(phydev, MII_LXT970_IER, 0);
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}
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static int lxt970_config_init(struct phy_device *phydev)
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{
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return phy_write(phydev, MII_LXT970_CONFIG, 0);
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}
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static int lxt971_ack_interrupt(struct phy_device *phydev)
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{
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int err = phy_read(phydev, MII_LXT971_ISR);
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if (err < 0)
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return err;
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return 0;
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}
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static int lxt971_config_intr(struct phy_device *phydev)
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{
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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return phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
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else
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return phy_write(phydev, MII_LXT971_IER, 0);
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}
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/*
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* A2 version of LXT973 chip has an ERRATA: it randomly return the contents
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* of the previous even register when you read a odd register regularly
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*/
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static int lxt973a2_update_link(struct phy_device *phydev)
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{
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int status;
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int control;
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int retry = 8; /* we try 8 times */
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/* Do a fake read */
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status = phy_read(phydev, MII_BMSR);
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if (status < 0)
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return status;
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control = phy_read(phydev, MII_BMCR);
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if (control < 0)
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return control;
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do {
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/* Read link and autonegotiation status */
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status = phy_read(phydev, MII_BMSR);
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} while (status >= 0 && retry-- && status == control);
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if (status < 0)
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return status;
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if ((status & BMSR_LSTATUS) == 0)
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phydev->link = 0;
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else
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phydev->link = 1;
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return 0;
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}
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static int lxt973a2_read_status(struct phy_device *phydev)
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{
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int adv;
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int err;
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int lpa;
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/* Update the link, but return if there was an error */
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err = lxt973a2_update_link(phydev);
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if (err)
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return err;
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if (AUTONEG_ENABLE == phydev->autoneg) {
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int retry = 1;
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adv = phy_read(phydev, MII_ADVERTISE);
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if (adv < 0)
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return adv;
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do {
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lpa = phy_read(phydev, MII_LPA);
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if (lpa < 0)
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return lpa;
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/* If both registers are equal, it is suspect but not
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* impossible, hence a new try
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*/
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} while (lpa == adv && retry--);
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mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
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lpa &= adv;
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phydev->speed = SPEED_10;
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phydev->duplex = DUPLEX_HALF;
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phydev->pause = phydev->asym_pause = 0;
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if (lpa & (LPA_100FULL | LPA_100HALF)) {
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phydev->speed = SPEED_100;
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if (lpa & LPA_100FULL)
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phydev->duplex = DUPLEX_FULL;
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} else {
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if (lpa & LPA_10FULL)
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phydev->duplex = DUPLEX_FULL;
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}
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if (phydev->duplex == DUPLEX_FULL) {
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phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
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phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
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}
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} else {
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int bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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if (bmcr & BMCR_FULLDPLX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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if (bmcr & BMCR_SPEED1000)
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phydev->speed = SPEED_1000;
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else if (bmcr & BMCR_SPEED100)
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phydev->speed = SPEED_100;
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else
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phydev->speed = SPEED_10;
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phydev->pause = phydev->asym_pause = 0;
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linkmode_zero(phydev->lp_advertising);
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}
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return 0;
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}
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static int lxt973_probe(struct phy_device *phydev)
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{
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int val = phy_read(phydev, MII_LXT973_PCR);
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if (val & PCR_FIBER_SELECT) {
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/*
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* If fiber is selected, then the only correct setting
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* is 100Mbps, full duplex, and auto negotiation off.
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*/
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val = phy_read(phydev, MII_BMCR);
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val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
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val &= ~BMCR_ANENABLE;
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phy_write(phydev, MII_BMCR, val);
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/* Remember that the port is in fiber mode. */
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phydev->priv = lxt973_probe;
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} else {
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phydev->priv = NULL;
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}
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return 0;
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}
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static int lxt973_config_aneg(struct phy_device *phydev)
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{
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/* Do nothing if port is in fiber mode. */
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return phydev->priv ? 0 : genphy_config_aneg(phydev);
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}
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static struct phy_driver lxt97x_driver[] = {
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{
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.phy_id = 0x78100000,
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.name = "LXT970",
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.phy_id_mask = 0xfffffff0,
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/* PHY_BASIC_FEATURES */
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.config_init = lxt970_config_init,
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.ack_interrupt = lxt970_ack_interrupt,
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.config_intr = lxt970_config_intr,
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}, {
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.phy_id = 0x001378e0,
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.name = "LXT971",
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.phy_id_mask = 0xfffffff0,
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/* PHY_BASIC_FEATURES */
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.ack_interrupt = lxt971_ack_interrupt,
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.config_intr = lxt971_config_intr,
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}, {
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.phy_id = 0x00137a10,
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.name = "LXT973-A2",
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.phy_id_mask = 0xffffffff,
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/* PHY_BASIC_FEATURES */
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.flags = 0,
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.probe = lxt973_probe,
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.config_aneg = lxt973_config_aneg,
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.read_status = lxt973a2_read_status,
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}, {
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.phy_id = 0x00137a10,
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.name = "LXT973",
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.phy_id_mask = 0xfffffff0,
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/* PHY_BASIC_FEATURES */
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.flags = 0,
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.probe = lxt973_probe,
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.config_aneg = lxt973_config_aneg,
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} };
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module_phy_driver(lxt97x_driver);
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static struct mdio_device_id __maybe_unused lxt_tbl[] = {
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{ 0x78100000, 0xfffffff0 },
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{ 0x001378e0, 0xfffffff0 },
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{ 0x00137a10, 0xfffffff0 },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, lxt_tbl);
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