AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-27 19:15:04 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity
a17bab2d67
linux_dsm_epyc7002/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped
Denys Vlasenko 060ae855a8 [SCSI] aic7xxx: update *_shipped files 
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
2008-10-23 11:42:12 -05:00

414 lines
11 KiB
Plaintext
Raw Blame History

/*
* DO NOT EDIT - This file is automatically generated
* from the following source files:
*
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
*/
#include "aic7xxx_osm.h"
static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
{ "SCSIRSTO", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
{ "ENAUTOATNO", 0x08, 0x08 },
{ "ENRSELI", 0x10, 0x10 },
{ "ENSELI", 0x20, 0x20 },
{ "ENSELO", 0x40, 0x40 },
{ "TEMODE", 0x80, 0x80 }
};
int
ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
0x00, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
{ "CLRCHN", 0x02, 0x02 },
{ "SCAMEN", 0x04, 0x04 },
{ "SPIOEN", 0x08, 0x08 },
{ "CLRSTCNT", 0x10, 0x10 },
{ "FAST20", 0x20, 0x20 },
{ "DFPEXP", 0x40, 0x40 },
{ "DFON", 0x80, 0x80 }
};
int
ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
0x01, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
{ "ACKI", 0x01, 0x01 },
{ "REQI", 0x02, 0x02 },
{ "BSYI", 0x04, 0x04 },
{ "SELI", 0x08, 0x08 },
{ "ATNI", 0x10, 0x10 },
{ "MSGI", 0x20, 0x20 },
{ "IOI", 0x40, 0x40 },
{ "CDI", 0x80, 0x80 },
{ "P_DATAOUT", 0x00, 0x00 },
{ "P_DATAOUT_DT", 0x20, 0x20 },
{ "P_DATAIN", 0x40, 0x40 },
{ "P_DATAIN_DT", 0x60, 0x60 },
{ "P_COMMAND", 0x80, 0x80 },
{ "P_MESGOUT", 0xa0, 0xa0 },
{ "P_STATUS", 0xc0, 0xc0 },
{ "PHASE_MASK", 0xe0, 0xe0 },
{ "P_MESGIN", 0xe0, 0xe0 }
};
int
ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
0x03, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
{ "SINGLE_EDGE", 0x10, 0x10 },
{ "ENABLE_CRC", 0x40, 0x40 },
{ "WIDEXFER", 0x80, 0x80 },
{ "SXFR_ULTRA2", 0x0f, 0x0f },
{ "SOFS", 0x0f, 0x0f },
{ "SXFR", 0x70, 0x70 }
};
int
ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
0x04, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "DMADONE", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 },
{ "SDONE", 0x04, 0x04 },
{ "SWRAP", 0x08, 0x08 },
{ "IOERR", 0x08, 0x08 },
{ "SELINGO", 0x10, 0x10 },
{ "SELDI", 0x20, 0x20 },
{ "SELDO", 0x40, 0x40 },
{ "TARGET", 0x80, 0x80 }
};
int
ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
0x0b, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 },
{ "PHASECHG", 0x02, 0x02 },
{ "SCSIPERR", 0x04, 0x04 },
{ "BUSFREE", 0x08, 0x08 },
{ "PHASEMIS", 0x10, 0x10 },
{ "SCSIRSTI", 0x20, 0x20 },
{ "ATNTARG", 0x40, 0x40 },
{ "SELTO", 0x80, 0x80 }
};
int
ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
0x0c, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
{ "DUAL_EDGE_ERR", 0x01, 0x01 },
{ "CRCREQERR", 0x02, 0x02 },
{ "CRCENDERR", 0x04, 0x04 },
{ "CRCVALERR", 0x08, 0x08 },
{ "EXP_ACTIVE", 0x10, 0x10 },
{ "SHVALID", 0x40, 0x40 },
{ "OVERRUN", 0x80, 0x80 },
{ "SFCNT", 0x1f, 0x1f }
};
int
ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
0x0d, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
{ "OFFCNT", 0x0f, 0x0f },
{ "U2OFFCNT", 0x7f, 0x7f },
{ "SCSICNT", 0xf0, 0xf0 }
};
int
ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
0x0e, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENDMADONE", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENSDONE", 0x04, 0x04 },
{ "ENSWRAP", 0x08, 0x08 },
{ "ENIOERR", 0x08, 0x08 },
{ "ENSELINGO", 0x10, 0x10 },
{ "ENSELDI", 0x20, 0x20 },
{ "ENSELDO", 0x40, 0x40 }
};
int
ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
0x10, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
{ "ENREQINIT", 0x01, 0x01 },
{ "ENPHASECHG", 0x02, 0x02 },
{ "ENSCSIPERR", 0x04, 0x04 },
{ "ENBUSFREE", 0x08, 0x08 },
{ "ENPHASEMIS", 0x10, 0x10 },
{ "ENSCSIRST", 0x20, 0x20 },
{ "ENATNTARG", 0x40, 0x40 },
{ "ENSELTIMO", 0x80, 0x80 }
};
int
ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
0x11, regvalue, cur_col, wrap));
}
int
ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SCSIBUSL",
0x12, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
{ "XCVR", 0x01, 0x01 },
{ "SELWIDE", 0x02, 0x02 },
{ "ENAB20", 0x04, 0x04 },
{ "SELBUSB", 0x08, 0x08 },
{ "ENAB40", 0x08, 0x08 },
{ "AUTOFLUSHDIS", 0x20, 0x20 },
{ "DIAGLEDON", 0x40, 0x40 },
{ "DIAGLEDEN", 0x80, 0x80 }
};
int
ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
0x1f, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
{ "NO_DISCONNECT", 0x01, 0x01 },
{ "SPHASE_PENDING", 0x02, 0x02 },
{ "DPHASE_PENDING", 0x04, 0x04 },
{ "CMDPHASE_PENDING", 0x08, 0x08 },
{ "TARG_CMD_PENDING", 0x10, 0x10 },
{ "DPHASE", 0x20, 0x20 },
{ "NO_CDB_SENT", 0x40, 0x40 },
{ "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
{ "NOT_IDENTIFIED", 0x80, 0x80 }
};
int
ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
0x3c, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
{ "MSGI", 0x20, 0x20 },
{ "IOI", 0x40, 0x40 },
{ "CDI", 0x80, 0x80 },
{ "P_DATAOUT", 0x00, 0x00 },
{ "P_BUSFREE", 0x01, 0x01 },
{ "P_DATAIN", 0x40, 0x40 },
{ "P_COMMAND", 0x80, 0x80 },
{ "P_MESGOUT", 0xa0, 0xa0 },
{ "P_STATUS", 0xc0, 0xc0 },
{ "PHASE_MASK", 0xe0, 0xe0 },
{ "P_MESGIN", 0xe0, 0xe0 }
};
int
ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
0x3f, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
{ "LOADRAM", 0x01, 0x01 },
{ "SEQRESET", 0x02, 0x02 },
{ "STEP", 0x04, 0x04 },
{ "BRKADRINTEN", 0x08, 0x08 },
{ "FASTMODE", 0x10, 0x10 },
{ "FAILDIS", 0x20, 0x20 },
{ "PAUSEDIS", 0x40, 0x40 },
{ "PERRORDIS", 0x80, 0x80 }
};
int
ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
0x60, regvalue, cur_col, wrap));
}
int
ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SRAM_BASE",
0x70, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
{ "ILLHADDR", 0x01, 0x01 },
{ "ILLSADDR", 0x02, 0x02 },
{ "ILLOPCODE", 0x04, 0x04 },
{ "SQPARERR", 0x08, 0x08 },
{ "DPARERR", 0x10, 0x10 },
{ "MPARERR", 0x20, 0x20 },
{ "PCIERRSTAT", 0x40, 0x40 },
{ "CIOPARERR", 0x80, 0x80 }
};
int
ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
0x92, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
{ "HDMAEN", 0x08, 0x08 },
{ "HDMAENACK", 0x08, 0x08 },
{ "SDMAEN", 0x10, 0x10 },
{ "SDMAENACK", 0x10, 0x10 },
{ "SCSIEN", 0x20, 0x20 },
{ "WIDEODD", 0x40, 0x40 },
{ "PRELOADEN", 0x80, 0x80 }
};
int
ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
0x93, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
{ "FIFOEMP", 0x01, 0x01 },
{ "FIFOFULL", 0x02, 0x02 },
{ "DFTHRESH", 0x04, 0x04 },
{ "HDONE", 0x08, 0x08 },
{ "MREQPEND", 0x10, 0x10 },
{ "FIFOQWDEMP", 0x20, 0x20 },
{ "DFCACHETH", 0x40, 0x40 },
{ "PRELOAD_AVAIL", 0x80, 0x80 }
};
int
ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
0x94, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
{ "DATA_OUT_PHASE", 0x01, 0x01 },
{ "DATA_IN_PHASE", 0x02, 0x02 },
{ "MSG_OUT_PHASE", 0x04, 0x04 },
{ "MSG_IN_PHASE", 0x08, 0x08 },
{ "COMMAND_PHASE", 0x10, 0x10 },
{ "STATUS_PHASE", 0x20, 0x20 },
{ "DATA_PHASE_MASK", 0x03, 0x03 }
};
int
ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
0x9e, regvalue, cur_col, wrap));
}
int
ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SCB_BASE",
0xa0, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
{ "DISCONNECTED", 0x04, 0x04 },
{ "ULTRAENB", 0x08, 0x08 },
{ "MK_MESSAGE", 0x10, 0x10 },
{ "TAG_ENB", 0x20, 0x20 },
{ "DISCENB", 0x40, 0x40 },
{ "TARGET_SCB", 0x80, 0x80 },
{ "STATUS_RCVD", 0x80, 0x80 },
{ "SCB_TAG_TYPE", 0x03, 0x03 }
};
int
ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
0xb8, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
{ "TWIN_CHNLB", 0x80, 0x80 },
{ "OID", 0x0f, 0x0f },
{ "TWIN_TID", 0x70, 0x70 },
{ "TID", 0xf0, 0xf0 }
};
int
ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
0xb9, regvalue, cur_col, wrap));
}
static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
{ "SCB_XFERLEN_ODD", 0x80, 0x80 },
{ "LID", 0x3f, 0x3f }
};
int
ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
0xba, regvalue, cur_col, wrap));
}
int
ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SCB_TAG",
0xbb, regvalue, cur_col, wrap));
}
Reference in New Issue View Git Blame Copy Permalink