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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8bf27eaa04
Some registers of clock controller have to be set to certain values before entering system suspend state. Till now drivers did that on their own, but it will be easier to handle it by generic code and let drivers simply to provide the list of registers and their state. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
393 lines
10 KiB
C
393 lines
10 KiB
C
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* Copyright (c) 2013 Linaro Ltd.
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* Author: Thomas Abraham <thomas.ab@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file includes utility functions to register clocks to common
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* clock framework for Samsung platforms.
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*/
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#include <linux/slab.h>
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#include <linux/clkdev.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/of_address.h>
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#include <linux/syscore_ops.h>
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#include "clk.h"
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static LIST_HEAD(clock_reg_cache_list);
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void samsung_clk_save(void __iomem *base,
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struct samsung_clk_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd)
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rd->value = readl(base + rd->offset);
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}
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void samsung_clk_restore(void __iomem *base,
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const struct samsung_clk_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd)
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writel(rd->value, base + rd->offset);
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}
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struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
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const unsigned long *rdump,
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unsigned long nr_rdump)
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{
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struct samsung_clk_reg_dump *rd;
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unsigned int i;
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rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
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if (!rd)
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return NULL;
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for (i = 0; i < nr_rdump; ++i)
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rd[i].offset = rdump[i];
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return rd;
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}
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/* setup the essentials required to support clock lookup using ccf */
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struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
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void __iomem *base, unsigned long nr_clks)
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{
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struct samsung_clk_provider *ctx;
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int i;
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ctx = kzalloc(sizeof(struct samsung_clk_provider) +
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sizeof(*ctx->clk_data.hws) * nr_clks, GFP_KERNEL);
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if (!ctx)
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panic("could not allocate clock provider context.\n");
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for (i = 0; i < nr_clks; ++i)
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ctx->clk_data.hws[i] = ERR_PTR(-ENOENT);
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ctx->reg_base = base;
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ctx->clk_data.num = nr_clks;
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spin_lock_init(&ctx->lock);
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return ctx;
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}
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void __init samsung_clk_of_add_provider(struct device_node *np,
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struct samsung_clk_provider *ctx)
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{
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if (np) {
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if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
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&ctx->clk_data))
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panic("could not register clk provider\n");
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}
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}
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/* add a clock instance to the clock lookup table used for dt based lookup */
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void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
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struct clk_hw *clk_hw, unsigned int id)
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{
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if (id)
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ctx->clk_data.hws[id] = clk_hw;
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}
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/* register a list of aliases */
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void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
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const struct samsung_clock_alias *list,
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unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx, ret;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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if (!list->id) {
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pr_err("%s: clock id missing for index %d\n", __func__,
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idx);
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continue;
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}
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clk_hw = ctx->clk_data.hws[list->id];
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if (!clk_hw) {
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pr_err("%s: failed to find clock %d\n", __func__,
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list->id);
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continue;
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}
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ret = clk_hw_register_clkdev(clk_hw, list->alias,
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list->dev_name);
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if (ret)
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pr_err("%s: failed to register lookup %s\n",
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__func__, list->alias);
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}
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}
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/* register a list of fixed clocks */
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void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
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const struct samsung_fixed_rate_clock *list,
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unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx, ret;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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clk_hw = clk_hw_register_fixed_rate(ctx->dev, list->name,
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list->parent_name, list->flags, list->fixed_rate);
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if (IS_ERR(clk_hw)) {
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pr_err("%s: failed to register clock %s\n", __func__,
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list->name);
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continue;
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}
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samsung_clk_add_lookup(ctx, clk_hw, list->id);
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/*
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* Unconditionally add a clock lookup for the fixed rate clocks.
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* There are not many of these on any of Samsung platforms.
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*/
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ret = clk_hw_register_clkdev(clk_hw, list->name, NULL);
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if (ret)
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pr_err("%s: failed to register clock lookup for %s",
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__func__, list->name);
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}
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}
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/* register a list of fixed factor clocks */
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void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
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const struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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clk_hw = clk_hw_register_fixed_factor(ctx->dev, list->name,
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list->parent_name, list->flags, list->mult, list->div);
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if (IS_ERR(clk_hw)) {
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pr_err("%s: failed to register clock %s\n", __func__,
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list->name);
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continue;
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}
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samsung_clk_add_lookup(ctx, clk_hw, list->id);
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}
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}
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/* register a list of mux clocks */
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void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
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const struct samsung_mux_clock *list,
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unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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clk_hw = clk_hw_register_mux(ctx->dev, list->name,
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list->parent_names, list->num_parents, list->flags,
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ctx->reg_base + list->offset,
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list->shift, list->width, list->mux_flags, &ctx->lock);
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if (IS_ERR(clk_hw)) {
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pr_err("%s: failed to register clock %s\n", __func__,
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list->name);
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continue;
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}
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samsung_clk_add_lookup(ctx, clk_hw, list->id);
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}
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}
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/* register a list of div clocks */
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void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
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const struct samsung_div_clock *list,
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unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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if (list->table)
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clk_hw = clk_hw_register_divider_table(ctx->dev,
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list->name, list->parent_name, list->flags,
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ctx->reg_base + list->offset,
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list->shift, list->width, list->div_flags,
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list->table, &ctx->lock);
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else
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clk_hw = clk_hw_register_divider(ctx->dev, list->name,
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list->parent_name, list->flags,
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ctx->reg_base + list->offset, list->shift,
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list->width, list->div_flags, &ctx->lock);
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if (IS_ERR(clk_hw)) {
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pr_err("%s: failed to register clock %s\n", __func__,
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list->name);
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continue;
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}
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samsung_clk_add_lookup(ctx, clk_hw, list->id);
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}
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}
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/* register a list of gate clocks */
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void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
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const struct samsung_gate_clock *list,
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unsigned int nr_clk)
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{
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struct clk_hw *clk_hw;
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unsigned int idx;
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for (idx = 0; idx < nr_clk; idx++, list++) {
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clk_hw = clk_hw_register_gate(ctx->dev, list->name, list->parent_name,
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list->flags, ctx->reg_base + list->offset,
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list->bit_idx, list->gate_flags, &ctx->lock);
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if (IS_ERR(clk_hw)) {
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pr_err("%s: failed to register clock %s\n", __func__,
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list->name);
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continue;
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}
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samsung_clk_add_lookup(ctx, clk_hw, list->id);
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}
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}
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/*
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* obtain the clock speed of all external fixed clock sources from device
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* tree and register it
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*/
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void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
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struct samsung_fixed_rate_clock *fixed_rate_clk,
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unsigned int nr_fixed_rate_clk,
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const struct of_device_id *clk_matches)
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{
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const struct of_device_id *match;
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struct device_node *clk_np;
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u32 freq;
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for_each_matching_node_and_match(clk_np, clk_matches, &match) {
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if (of_property_read_u32(clk_np, "clock-frequency", &freq))
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continue;
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fixed_rate_clk[(unsigned long)match->data].fixed_rate = freq;
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}
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samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
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}
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/* utility function to get the rate of a specified clock */
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unsigned long _get_rate(const char *clk_name)
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{
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struct clk *clk;
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clk = __clk_lookup(clk_name);
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if (!clk) {
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pr_err("%s: could not find clock %s\n", __func__, clk_name);
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return 0;
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}
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return clk_get_rate(clk);
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}
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#ifdef CONFIG_PM_SLEEP
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static int samsung_clk_suspend(void)
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{
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struct samsung_clock_reg_cache *reg_cache;
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list_for_each_entry(reg_cache, &clock_reg_cache_list, node) {
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samsung_clk_save(reg_cache->reg_base, reg_cache->rdump,
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reg_cache->rd_num);
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samsung_clk_restore(reg_cache->reg_base, reg_cache->rsuspend,
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reg_cache->rsuspend_num);
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}
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return 0;
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}
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static void samsung_clk_resume(void)
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{
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struct samsung_clock_reg_cache *reg_cache;
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list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
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samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump,
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reg_cache->rd_num);
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}
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static struct syscore_ops samsung_clk_syscore_ops = {
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.suspend = samsung_clk_suspend,
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.resume = samsung_clk_resume,
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};
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void samsung_clk_extended_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump,
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const struct samsung_clk_reg_dump *rsuspend,
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unsigned long nr_rsuspend)
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{
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struct samsung_clock_reg_cache *reg_cache;
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reg_cache = kzalloc(sizeof(struct samsung_clock_reg_cache),
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GFP_KERNEL);
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if (!reg_cache)
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panic("could not allocate register reg_cache.\n");
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reg_cache->rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
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if (!reg_cache->rdump)
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panic("could not allocate register dump storage.\n");
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if (list_empty(&clock_reg_cache_list))
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register_syscore_ops(&samsung_clk_syscore_ops);
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reg_cache->reg_base = reg_base;
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reg_cache->rd_num = nr_rdump;
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reg_cache->rsuspend = rsuspend;
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reg_cache->rsuspend_num = nr_rsuspend;
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list_add_tail(®_cache->node, &clock_reg_cache_list);
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}
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#endif
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/*
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* Common function which registers plls, muxes, dividers and gates
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* for each CMU. It also add CMU register list to register cache.
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*/
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struct samsung_clk_provider * __init samsung_cmu_register_one(
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struct device_node *np,
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const struct samsung_cmu_info *cmu)
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{
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void __iomem *reg_base;
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struct samsung_clk_provider *ctx;
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reg_base = of_iomap(np, 0);
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if (!reg_base) {
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panic("%s: failed to map registers\n", __func__);
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return NULL;
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}
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ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
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if (!ctx) {
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panic("%s: unable to allocate ctx\n", __func__);
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return ctx;
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}
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if (cmu->pll_clks)
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samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
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reg_base);
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if (cmu->mux_clks)
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samsung_clk_register_mux(ctx, cmu->mux_clks,
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cmu->nr_mux_clks);
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if (cmu->div_clks)
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samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks);
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if (cmu->gate_clks)
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samsung_clk_register_gate(ctx, cmu->gate_clks,
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cmu->nr_gate_clks);
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if (cmu->fixed_clks)
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samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks,
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cmu->nr_fixed_clks);
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if (cmu->fixed_factor_clks)
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samsung_clk_register_fixed_factor(ctx, cmu->fixed_factor_clks,
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cmu->nr_fixed_factor_clks);
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if (cmu->clk_regs)
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samsung_clk_extended_sleep_init(reg_base,
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cmu->clk_regs, cmu->nr_clk_regs,
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cmu->suspend_regs, cmu->nr_suspend_regs);
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samsung_clk_of_add_provider(np, ctx);
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return ctx;
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}
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