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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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bcb8243792
Simplify the power request code by passing an "on" flag, and picking the
right status bit and register offset in the innermost function, based on
this flag.
This allows to remove the rcar_sysc_pwr_{off,on}() helper functions, and
the function pointer through which they were called.
Make sr_bit and reg_offs unsigned while we're at it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
165 lines
4.1 KiB
C
165 lines
4.1 KiB
C
/*
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* R-Car SYSC Power management support
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*
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* Copyright (C) 2014 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include "pm-rcar.h"
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/* SYSC Common */
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#define SYSCSR 0x00 /* SYSC Status Register */
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#define SYSCISR 0x04 /* Interrupt Status Register */
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#define SYSCISCR 0x08 /* Interrupt Status Clear Register */
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#define SYSCIER 0x0c /* Interrupt Enable Register */
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#define SYSCIMR 0x10 /* Interrupt Mask Register */
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/* SYSC Status Register */
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#define SYSCSR_PONENB 1 /* Ready for power resume requests */
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#define SYSCSR_POFFENB 0 /* Ready for power shutoff requests */
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/*
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* Power Control Register Offsets inside the register block for each domain
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* Note: The "CR" registers for ARM cores exist on H1 only
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* Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
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*/
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#define PWRSR_OFFS 0x00 /* Power Status Register */
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#define PWROFFCR_OFFS 0x04 /* Power Shutoff Control Register */
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#define PWROFFSR_OFFS 0x08 /* Power Shutoff Status Register */
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#define PWRONCR_OFFS 0x0c /* Power Resume Control Register */
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#define PWRONSR_OFFS 0x10 /* Power Resume Status Register */
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#define PWRER_OFFS 0x14 /* Power Shutoff/Resume Error */
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#define SYSCSR_RETRIES 100
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#define SYSCSR_DELAY_US 1
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#define PWRER_RETRIES 100
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#define PWRER_DELAY_US 1
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#define SYSCISR_RETRIES 1000
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#define SYSCISR_DELAY_US 1
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static void __iomem *rcar_sysc_base;
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static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
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static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
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{
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unsigned int sr_bit, reg_offs;
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int k;
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if (on) {
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sr_bit = SYSCSR_PONENB;
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reg_offs = PWRONCR_OFFS;
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} else {
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sr_bit = SYSCSR_POFFENB;
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reg_offs = PWROFFCR_OFFS;
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}
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/* Wait until SYSC is ready to accept a power request */
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for (k = 0; k < SYSCSR_RETRIES; k++) {
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if (ioread32(rcar_sysc_base + SYSCSR) & BIT(sr_bit))
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break;
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udelay(SYSCSR_DELAY_US);
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}
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if (k == SYSCSR_RETRIES)
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return -EAGAIN;
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/* Submit power shutoff or power resume request */
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iowrite32(BIT(sysc_ch->chan_bit),
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rcar_sysc_base + sysc_ch->chan_offs + reg_offs);
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return 0;
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}
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static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
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{
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unsigned int isr_mask = BIT(sysc_ch->isr_bit);
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unsigned int chan_mask = BIT(sysc_ch->chan_bit);
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unsigned int status;
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unsigned long flags;
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int ret = 0;
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int k;
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spin_lock_irqsave(&rcar_sysc_lock, flags);
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iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
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/* Submit power shutoff or resume request until it was accepted */
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for (k = 0; k < PWRER_RETRIES; k++) {
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ret = rcar_sysc_pwr_on_off(sysc_ch, on);
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if (ret)
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goto out;
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status = ioread32(rcar_sysc_base +
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sysc_ch->chan_offs + PWRER_OFFS);
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if (!(status & chan_mask))
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break;
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udelay(PWRER_DELAY_US);
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}
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if (k == PWRER_RETRIES) {
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ret = -EIO;
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goto out;
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}
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/* Wait until the power shutoff or resume request has completed * */
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for (k = 0; k < SYSCISR_RETRIES; k++) {
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if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask)
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break;
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udelay(SYSCISR_DELAY_US);
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}
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if (k == SYSCISR_RETRIES)
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ret = -EIO;
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iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
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out:
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spin_unlock_irqrestore(&rcar_sysc_lock, flags);
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pr_debug("sysc power domain %d: %08x -> %d\n",
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sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
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return ret;
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}
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int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch)
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{
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return rcar_sysc_power(sysc_ch, false);
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}
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int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch)
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{
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return rcar_sysc_power(sysc_ch, true);
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}
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bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
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{
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unsigned int st;
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st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS);
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if (st & BIT(sysc_ch->chan_bit))
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return true;
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return false;
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}
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void __iomem *rcar_sysc_init(phys_addr_t base)
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{
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rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
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if (!rcar_sysc_base)
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panic("unable to ioremap R-Car SYSC hardware block\n");
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return rcar_sysc_base;
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}
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